CML Datasheet | Specifications & PDF Download

MwT-PH7F 28 GHz Medium Power AlGaAs/InGaAs pHEMT Features: • 24.5 dBm of Power at 18 GHz • 15 dB typical Small Signal Gain at 18 GHz • 45% typical P

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NB6HQ14M 2.5V 5GHz / 6.5Gbps Differential Input to 1.8V / 2.5V 1:4 CML Clock / Data Fanout Buffer w/ Selectable Input Equalizer Multi−Level Inputs w/

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DATA BULLETIN MX029 Features Dual Digitally Controlled Amplifier PRELIMINARY INFORMATION Applications Cellular and LMR Radios PABX

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CML Microcircuits COMMUNICATION SEMICONDUCTORS CML Product Data In the process of creating a more global image, the three standard product semiconduc

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CML Microcircuits COMMUNICATION SEMICONDUCTORS CML Product Data In the process of creating a more global image, the three standard product semiconduc

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COMMUNICATION SEMICONDUCTORS DATA BULLETIN Features • 1200bps - 1800bps half duplex Bell 202 Compatible Modem • Optional 1200bps Data Retiming Facilit

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CML Microcircuits COMMUNICATION SEMICONDUCTORS CML Product Data In the process of creating a more global image, the three standard product semiconduct

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CML Microcircuits COMMUNICATION SEMICONDUCTORS CML Product Data In the process of creating a more global image, the three standard product semiconduct

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MX118 FULL-DUPLEX SCRAMBLER FOR CORDLESS TELEPHONES Features Full-Duplex Audio Processing On-Chip “Brick-wall” Filters (300-3000 Hz) Low Voltage CMOS

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DATA BULLETIN MX019 FEATURES 4 Digitally Controlled Amplifiers 15 Gain/Attenuation Steps 3 Amplifiers ± 3dB Range in 0.43dB Steps 1 'Volume'

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DATA BULLETIN MX315A Features Field Programmable Tone Encoder 40 CTCSS Frequencies Crystal-Controlled Frequency Stability Low Distortion Sine

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NB7L32M 2.5V/3.3V, 14GHz ÷2 Clock Divider w/CML Output and Internal Termination Description The NB7L32M is an integrated ÷2 divider with differential

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NB7HQ14M 2.5V 7GHz / 10Gbps Differential Input to 1.8V / 2.5V 1:4 CML Clock / Data Fanout Buffer w/ Selectable Input Equalizer Multi−Level Inputs w/ I

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NB6LQ572M 2.5V / 3.3V Differential 4:1 Mux w/Input Equalizer to 1:2 CML Clock/Data Fanout / Translator Multi−Level Inputs w/ Internal Termination Desc

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