SDRAM (Rev. 0.3) MITSUBISHI LSIs Feb ‘97 Preli.
Mitsubishi
M5M4V4S40CTP-12 - 4M (2-BANK x 131072-WORD x 16-BIT) Synchronous DRAM
SDRAM (Rev. 0.3) MITSUBISHI LSIs Feb ‘97 Preliminary M5M4V4S40CTP-12, -15 4M (2-BANK x 131072-WORD x 16-BIT) Synchronous DRAM PRELIMINARY Some of.
