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Aeroflex Circuit Technology
Aeroflex Circuit Technology

UT700 Datasheet Preview

UT700 Datasheet

32-bit Fault-Tolerant SPARC V8/LEON 3FT Processor

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UT700 pdf
Standard Products
UT700 32-bit Fault-Tolerant
SPARCTM V8/LEON 3FT Processor
Datasheet
March 2015
www.aeroflex.com/LEON
FEATURES
Supports up to 166 MHz clock rate
Separate instruction and data cache architecture
High-performance fully pipelined IEEE-754 FPU
Enhanced pipeline with 1.2 DMIPS / MHz performance
Implemented on 130nm CMOS technology
Internally configured clock network
Power saving 1.2V core power supply
3.3V I/O compatibility
Hardened-by-design flip-flops and memory cells
Reed Solomon EDAC
Multifunctional memory controller
10/100 Base-T Ethernet port for VxWorks development
Integrated PCI 2.2 compatible core
Four integrated multi-protocol SpaceWire nodes that
support the RMAP protocol
SPI interface
Two CAN 2.0 compliant bus interfaces
MIL-STD-1553 BC/RT/MT
-55oC to +105oC temperature range
Operational environment:
- Intrinsic total-dose: 100 krad(Si)
- SEL Immune <110 MeV-cm2/mg
Packaging options:
- 484-pin Ceramic Land Grid, Column Grid and Ball
Grid Array packages
Standard Microcircuit Drawing 5962-13238
- QML Q, Q+, and V
Applications
- Nuclear power plant controls
- Critical transportation systems
- High-altitude avionics
- Medical electronics
- X-Ray cargo scanning
- Spaceborne computer
- System controller boards
- Avionics processing boards
INTRODUCTION
The UT700 features a seven stage pipelined monolithic, high-
performance, fault-tolerant SPARCTM V8/LEON 3FT
Processor. L1 cache consists of 16kB for both instruction and
data caches. A Reed Solomon EDAC provides fault-tolerant
protection for SDRAM. Integer performance is 1.2 DMIPS /
MHz. RMAP protocol is supported for all four SpaceWire ports.
The UT700 provides a 32-bit master/target PCI interface,
including a 16 bit user I/O interface for off-chip peripherals. A
compliant 2.0 AMBA bus interface integrates the on-chip LEON
3FT, SpaceWire, Ethernet, memory controller, cPCI, CAN bus,
MIL-STD-1553, SPI and programmable interrupt peripherals.
The UT700 is SPARC V8 compliant; therefore, developers may
use industry standard compilers, kernels, and development
tools. A full software development suite is available including
a C/C++ cross-compiler system based on GCC and the Newlib
embedded C-library.
BCC includes a small run-time kernel with interrupt support and
Pthreads library. For multi-threaded applications, a SPARCTM
compliant port of the eCos real-time kernel, RTEMS 4.10, and
VxWorks 6.x is supported.
36-00-00-000
Ver. 1.3.1
1 Aeroflex Microelectronics Solutions - HiRel



Aeroflex Circuit Technology
Aeroflex Circuit Technology

UT700 Datasheet Preview

UT700 Datasheet

32-bit Fault-Tolerant SPARC V8/LEON 3FT Processor

No Preview Available !

UT700 pdf
1.0 Introduction
The UT700 LEON 3FT processor is based upon the industry-standard SPARC V8 architecture. The system-on-chip incorporates the
SPARC V8 core and the peripheral blocks indicated below. The core and peripherals communicate internally via the AMBA
(Advanced Microcontroller Bus Architecture) interconnect. This bus is comprised of the AHB (Advanced High-speed Bus) which is
used for high-speed data transfer, and the APB (Advanced Peripheral Bus) which is used for low-speed data transfer.
IEEE-754
FPU
LEON 3FT
MUL/DIV
MMU
4x4kB
4x4kB
Data Cache Instr Cache
AHB Interface
Debug
Support
Unit
JTAG
Debug
Link
SpW w/
RMAP
(4)
PCI
Bridge
Ethernet
MAC
CAN
(2)
SPI
AHB
Controller
AMBA AHB
FT Memory
Controller
AHB/APB
Bridge
AMBA APB
APB
UART
Timers
(4)
INT
Ctrl
GPIO
Clock
Gating
MIL-
STD-
1553
512MB
PROM
256MB
I/O
Up to
1GB
SRAM
Up to
1GB
SDRAM
Figure 1. UT700 Functional Block Diagram
The LEON 3FT architecture includes the following peripheral blocks:
• LEON3 SPARC V8 integer unit with 16kB instruction cache and 16kB of data cache
• IEEE-754 floating point unit
• Debug support unit
• UART, JTAG, SpaceWire, PCI, and Ethernet debug links
• 8/16/32-bit memory controller with BCH EDAC for external PROM and SRAM
• 32-bit SDRAM controller with Reed Solomon EDAC for external SDRAM
• Timer unit with three 32-bit timers and watchdog
• Interrupt controller for 15 interrupts in two priority levels
• 16-bit general purpose I/O port (GPIO) which can be used as external interrupt sources
• Up to four SpaceWire links with RMAP on all channels
• MIL-STD-1553 interface supports BC/RT/MT
• Up to two CAN controllers
• Ethernet with support for MII
• cPCI interface with 8-channel arbiter
36-00-00-000
Ver. 1.3.1
2 Aeroflex Microelectronics Solutions - HiRel


Part Number UT700
Description 32-bit Fault-Tolerant SPARC V8/LEON 3FT Processor
Maker Aeroflex Circuit Technology
Total Page 30 Pages
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