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CMU5N50 Datasheet Preview

CMU5N50 Datasheet

N-Channel Transistor

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CMU5N50 pdf
CMD5N50/CMU5N50
General Description
These N-Channel enhancement mode power field effect
transistors are produced using advanced technology
which has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for high efficiency switch mode power supplies,
power factor correction and electronic lamp ballasts based
on half bridge.
Product Summery
BVDSS
500V
RDSON
1.5
July 2011
ID
4.5A
Features
TO252 / TO251 Pin Configuration
Low gate charge (typical 27 nC)
Low Crss ( typical 17 pF)
Fast switching
100%avalanche tested
Improved dv/dt capability
D
G
S
TO252
G D S TO251
(CMD5N50)
(CMU5N50)
Absolute Maximum Ratings TC = 25°C unless otherwise noted
Symbol
Parameter
VDSS
Drain-Source Voltage
ID Drain Current - Continuous (TC = 25°C)
- Continuous (TC = 100°C)
IDM Drain Current - Pulsed
(Note 1)
VGSS
Gate-Source Voltage
EAS Single Pulsed Avalanche Energy
(Note 2)
IAR Avalanche Current
(Note 1)
EAR Repetitive Avalanche Energy
(Note 1)
dv/dt
Peak Diode Recovery dv/dt
(Note 3)
PD Power Dissipation (TC = 25°C)
- Derate above 25°C
TJ, TSTG
Operating and Storage Temperature Range
TL
Maximum lead temperature for soldering purposes,
1/8from case for 5 seconds
* Drain current limited by maximum junction temperature
CMD5N50/CMU5N50
500
4.5
2.9
15
±30
500
4.5
7.3
5.5
50
0.58
-55 to +150
300
Units
V
A
A
A
V
mJ
A
mJ
V/ns
W
W/°C
°C
°C
Thermal Characteristics
Symbol
RθJC
RθCS
RθJA
Parameter
Thermal Resistance, Junction-to-Case Max.
Thermal Resistance, Case-to-Sink Typ.
Thermal Resistance, Junction-to-Ambient Max.
CMD5N50/CMU5N50
1.71
0.5
62.5
Units
°C/W
°C/W
°C/W



Cmos
Cmos

CMU5N50 Datasheet Preview

CMU5N50 Datasheet

N-Channel Transistor

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CMU5N50 pdf
CMD5N50/CMU5N50
sElectrical Characteristic
TC = 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
July 2011
Min Typ Max Units
Off Characteristics
BVDSS Drain-Source Breakdown Voltage
BVDSS Breakdown Voltage Temperature
/ TJ Coefficient
IDSS
Zero Gate Voltage Drain Current
IGSSF
IGSSR
Gate-Body Leakage Current, Forward
Gate-Body Leakage Current, Reverse
VGS = 0 V, ID = 250 µA
ID = 250 µA, Referenced to 25°C
VDS = 500 V, VGS = 0 V
VGS = 30 V, VDS = 0 V
VGS = -30 V, VDS = 0 V
500
--
--
--
--
--
0.54
--
--
--
--
--
1
100
-100
V
V/°C
µA
nA
nA
On Characteristics
VGS(th) Gate Threshold Voltage
RDS(on)
Static Drain-Source
On-Resistance
gFS Forward Transconductance
VDS = VGS, ID = 250 µA
VGS = 10 V, ID = 2.5A
VDS = 40 V, ID = 2.25 A
(Note 4)
2.0
--
--
--
--
4.2
4.0
1.5
--
V
Ω
S
Dynamic Characteristics
Ciss Input Capacitance
Coss
Output Capacitance
Crss Reverse Transfer Capacitance
VDS = 25 V, VGS = 0 V,
f = 1.0 MHz
-- 800 1050 pF
-- 76 100 pF
-- 17 22 pF
Switching Characteristics
td(on)
Turn-On Delay Time
tr Turn-On Rise Time
td(off)
Turn-Off Delay Time
tf Turn-Off Fall Time
Qg Total Gate Charge
Qgs Gate-Source Charge
Qgd Gate-Drain Charge
VDD = 250 V, ID = 4.5 A,
RG = 25 Ω
(Note 4, 5)
VDS = 400 V, ID = 4.5 A,
VGS = 10 V
(Note 4, 5)
--
--
--
--
--
--
--
15 40
40 90
85 180
45 100
27 35
4.0 --
12 --
ns
ns
ns
ns
nC
nC
nC
Drain-Source Diode Characteristics and Maximum Ratings
IS Maximum Continuous Drain-Source Diode Forward Current
-- -- 4.5
ISM Maximum Pulsed Drain-Source Diode Forward Current
-- --
15
VSD Drain-Source Diode Forward Voltage VGS = 0 V, IS = 4.5 A
-- -- 1.4
trr Reverse Recovery Time
Qrr Reverse Recovery Charge
VGS = 0 V, IS = 4.5 A,
dIF / dt = 100 A/µs
(Note 4)
--
--
305
2.6
--
--
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 24mH, IAS = 4.5A, VDD = 50V, RG = 25Ω , Starting TJ = 25°C
3. ISD ≤ 4.5A , di/dt ≤ 300A/µs, VDD ≤ BVDSS, Starting TJ = 25°C
4. Pulse Test : Pulse width 300µs, Duty cycle 2%
5. Essentially independent of operating temperature
A
A
V
ns
µC


Part Number CMU5N50
Description N-Channel Transistor
Maker Cmos
Total Page 2 Pages
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