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IC62LV5128L Datasheet Preview

IC62LV5128L Datasheet

512Kx8 bit Low Voltage and Ultra Low Power CMOS Static RAM

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IC62LV5128L
IC62LV5128LL
Document Title
512Kx8 bit Low Voltage and Ultra Low Power CMOS Static RAM
Revision History
Revision No
0A
History
Initial Draft
Draft Date
May 1,2001
0B
1. Change for tPWE: 45 to 40 ns for 55 ns product
August 31,2001
: 60 to 40 ns for 70 ns product
2. Change for VCC: 2.2-3.6V to 2.7-3.6V
3.1 Change for ICC test conditiomn: VCC=Max. to 3V
3.2 Change for ICC: 30 to 25mA for 55 ns product
25 to 20mA for 70 ns porduct
20 to 15 mA for 100 ns product
4.1 Change for VDR Min. : 1.2 to 1.5V
4.2 Change for IDR test condition: VCC=1.2 to 1.5V and IDR
5. Change for tHZCE 25 to 20 ns for 55 ns product
6. Change for tHZWE 33 to 30 ns for 70 ns product
Remark
Preliminary
The attached datasheets are provided by ICSI. Integrated Circuit Solution Inc reserve the right to change the specifications and
products. ICSI will answer to your questions about device. If you have any questions, please contact the ICSI offices.
Integrated Circuit Solution Inc.
LPSR012-0B 08/31/2001
1



ICSI
ICSI

IC62LV5128L Datasheet Preview

IC62LV5128L Datasheet

512Kx8 bit Low Voltage and Ultra Low Power CMOS Static RAM

No Preview Available !

IC62LV5128L pdf
IC62LV5128L
IC62LV5128LL
512K x 8 LOW POWER and LOW VCC
CMOS STATIC RAM
FEATURES
• Access times of 55, 70, 100 ns
• CMOS Low power operation:
60 mW (typical) operation
3 µW (typical) standby
• Low data retention voltage: 1.5V (min.)
• Output Enable (OE) and Chip Enable
(CE) inputs for ease in applications
• TTL compatible inputs and outputs
• Fully static operation:
No clock or refresh reguired
• Single 2.7V-3.6V power supply
• Available in the 32-pin 8*20mm TSOP-1,
32-pin 8*13.4mm TSOP-1 and 48-pin
6*8mm TF-BGA
DESCRIPTION
The ICSI IC62LV5128L and IC62LV5128LL is a low voltage,
524,288 words by 8 bits, CMOS SRAM. It is fabricated using
ICSI's low voltage, six transistor (6T), CMOS technology. The
device is targeted to satisfy the demands of the state-of-the-art
technologies such as cell phones and pagers.
When CE is HIGH (deselected), the device assumes a standby
mode at which the power dissipation can be reduced down with
CMOS input levels. Additionally, easy memory expansion is
provided by using Chip Enable and Output Enable inputs, CE
and OE. The active LOW Write Enable ( WE) controls both
writing and reading of the memory.
The IC62LV5128L and IC62LV5128LL are available in 32-pin
8*20mm TSOP-1, 8*13.4mm TSOP-1 and 48-pin 6*8mm TF-
BGA.
FUNCTIONAL BLOCK DIAGRAM
A0-A18
VCC
GND
I/O0-I/O7
DECODER
I/O
DATA
CIRCUIT
512K x 8
MEMORY ARRAY
COLUMN I/O
CE
OE
CONTROL
CIRCUIT
WE
ICSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors
which may appear in this publication. © Copyright 2000, Integrated Circuit Solution Inc.
2 Integrated Circuit Solution Inc.
LPSR012-0B 08/31/2001


Part Number IC62LV5128L
Description 512Kx8 bit Low Voltage and Ultra Low Power CMOS Static RAM
Maker ICSI
Total Page 11 Pages
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1 IC62LV5128L 512Kx8 bit Low Voltage and Ultra Low Power CMOS Static RAM ICSI
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2 IC62LV5128LL 512Kx8 bit Low Voltage and Ultra Low Power CMOS Static RAM ICSI
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IC62LV5128LL pdf






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