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V103A Datasheet

TRIPLE 10-BIT LVDS TRANSMITTER FOR VIDEO

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V103A pdf
V103A
TRIPLE 10-BIT LVDS TRANSMITTER FOR VIDEO
General Description
The V103A LVDS display interface transmitter is
primarily designed to support pixel data transmission
between a video processing engine and a digital video
display. The data rate supports up to SXGA+
resolutions and can be used in Plasma, Rear Projector,
Front Projector, CRT and LCD display applications. It
can also be used in other high-bandwidth parallel data
applications and provides a low EMI interconnect over
a low cost, low bus width cable up to several meters in
length.
The V103A converts 35 bits of CMOS/TTL data,
clocked on the rising or falling edge of an input clock
(selectable), into six LVDS (Low Voltage Differential
Signaling) serial data stream pairs. In video
applications the 35 bits is normally divided into 10 bits
for each R, G and B channel and 5 control bits.
When combined with the V104 LVDS display interface
receiver, the V103A + V104 combination provides a
35-bit wide, 90 MHz transport. The rate of each LVDS
channel is 630 Mbps for a 90MHz data input clock, 945
Mbps for 135MHz.
Features
Pin compatible with THine THC63LVD103
Wide pixel clock range: 8 - 135 MHz
Guaranteed operation over -20 to +85° C ambient
temperature
Supports a wide range of video and graphics modes
including VGA, SVGA, XGA, SXGA, SXGA+, NTSC,
PAL, SDTV, and HDTV up to 1080I or 720P
Internal PLL requires no external loop filter
Selectable rising or falling clock edge for data
alignment
Compatible with Spread Spectrum clock source
Reduced LVDS output voltage swing mode
(selectable) to minimize EMI
CMOS/TTL data inputs can be configured for
reduced input voltage swing
Single 3.3 V supply
Low power consumption CMOS design
Power down mode
64-pin TQFP lead free package
Block Diagram
TA0-6
TB0-6
TC0-6
TD0-6
TE0-6
RS
R/F
/PWDN
7
7
7
7
7
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CLKIN
(8 to 135 MHz)
Parallel
to Serial
PLL
TA+
TA-
TB+
TB-
TC+
TC-
TD+
TD-
TE+
TE-
TCLK+
TCLK-
V103A Datasheet
1
11/18/05
Revision 3.2
Integrated Circuit Systems • 525 Race Street, San Jose, CA 95126 • tel (408) 297-1201 • www.icst.com


Integrated Device Technology Electronic Components Datasheet

V103A Datasheet

TRIPLE 10-BIT LVDS TRANSMITTER FOR VIDEO

No Preview Available !

V103A pdf
V103A
TRIPLE 10-BIT LVDS TRANSMITTER FOR VIDEO
Pin Assignment
TD5
GND
TD6
TE0
TE1
TE2
VCC
TE3
TE4
GND
TE5
CLKIN
/PWDN
PLLGND
PLLVCC
TE6
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
64-pin TQFP
48 TB5
47 GND
46 TB4
45 TB3
44 TB2
43 RS
42 TB1
41 TB0
40 TA6
39 GND
38 TA5
37 TA4
36 TA3
35 TA2
34 TA1
33 TA0
www.DataSheet4U.com
V103A Datasheet
2
11/18/05
Revision 3.2
Integrated Circuit Systems • 525 Race Street, San Jose, CA 95126 • tel (408) 297-1201 • www.icst.com


Part Number V103A
Description TRIPLE 10-BIT LVDS TRANSMITTER FOR VIDEO
Maker Integrated Device Technology
Total Page 11 Pages
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