MSM27C128K, -2, -3
131 072-BIT(16384-WORD BY 8-BIT)
CMOS ERASABLE AND ELECTRICALLY REPROGRAMMABLE ROM
Set the CE and OE terminals to the read mode (low level).
Low level input to CE and OE and address signals to the ad-
dress inputs (Ao - A ,3) make the data contents of the
designated address location available at the data input/output
(Do - 0 7), When the CE or OE signal is high, data input/ output
are in a floating state.
, When the CE signal is high, the device is in the standby
mode or power-down mode.
(Fast programming algorithm)
First set Vcc= 6V, Vpp=21V and then set an address to first
address to be programmed. After applying 1 ms program
pulse (PGM) to the address, verify is performed. If the output
data of that address is not verified correctly, apply one more 1
ms program pulse. The programmer continues 1 ms pulse-
then-verify routines until the device verify correctly or fifteen
of these pulse-then-verify routines have been completed. The
programmer also maintains its total number of 1 ms pulses ap-
plied to that address in register X. And then applied a program
pulse 4 times of register X value long as an overprogram pulse.
When the programming procedure above is finished, step to
the next address and repeat this procedure till last address to
be programmed. (See P.6-24)
(Conventional programming algorithm)
The device enters the programming mode when21V is sup-
plied to the Vpp power supply input and ~is at low level. A
location is designated by address signals (Ao-A,3), and the
data to be programmed must be applied at 8-bits in parallel to
the data inputs (Do - 0 7), A program pulse to the PGM at this
state will effect programming. Only one programming pulse is
required, but its width must satisfy the condition 45
Erase is effected by exposure to ultraviolet light with a
wavelength of 2537A at an intensity of appoximately
15WS/cm2. Sunlight and fluorescent light may contain
ultraviolet light sufficient to erase the programmed informa-
tion.. For any operation in the read mode, the transparent lid
should be covered with opaque tape.
, *: X can be either VIL or VIH ,
ABSOLUTE MAXIMUM RATINGS (Note 1)
,Temperature under bias
All input or output voltage (Note 2)
Vpp supply voltage during programming (Note 21
- 65-- 125
Note 1: Stresses above those listed may cause permanent damage to the devics. This is a stress rating only and
functional operation of the device at these or at any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended
periods affects device reliability.
2: With respect to Ground.
(11- 13, 15- 19)