ddr sdram 200pin dimm.
*DLL aligns DQ and DQS transition with CK transition
*Double-data-rate architecture.
*Bi-directional data strobe (DQS)
*Differential clock inputs(CK and /.
Features
*DLL aligns DQ and DQS transition with CK transition
*Double-data-rate architecture.
*Bi-directio.
The ADECB1608 is 16Mx64 bits Double Data Rate SDRAM Modules, The modules are composed of eight 16Mx8 bits CMOS Double Data Rate SDRAMs in TSOP-II 400mil 66pin package and one 2Kbit EEPROM in 8pin TSSOP(TSOP) package on a 200pin glass
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