synchronous dram.
*JEDEC standard LVTTL 3.3V power supply
*MRS Cycle with address key programs
-CAS Latency (2 & 3) -Burst Length (1,2,3,8,& full page) -Burst Type (sequential & In.
Features
*JEDEC standard LVTTL 3.3V power supply
*MRS Cycle with address key programs
-CAS Latency (2 & 3) -Bur.
The ADS6616A4A are four-bank Synchronous DRAMs organized as 1,048,576 words x 16 bits x 4 banks, Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle. Range of operating frequ.
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