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AK8122 - Differential Zero Delay Clock Buffer

General Description

The AK8122 is a high performance differential zero delay clock buffer IC with Phase Locked Loop (PLL).

Target application is DDR2 SDRAM and characteristics of these ICs are acceptable to standards of JEDEC.

Key Features

  • Operational Frequency Range: 160MHz.
  • 400MHz Output delay: -30 ±100ps Low Jitter Performance: 20 ps (Period RMS 190.
  • 360MHz) 30 ps (cycle.
  • cycle RMS 190.
  • 360MHz) 70 ps (Half Period RMS 190.
  • 250MHz) 60 ps (Half Period RMS 250.
  • 300MHz) 40 ps (Half Period RMS 300.
  • 360MHz).

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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ASAHI KASEI EMD CORPORATION Differential Zero Delay Clock Buffer AK8122 Features Operational Frequency Range: 160MHz – 400MHz Output delay: -30 ±100ps Low Jitter Performance: 20 ps (Period RMS 190 – 360MHz) 30 ps (cycle – cycle RMS 190 – 360MHz) 70 ps (Half Period RMS 190 – 250MHz) 60 ps (Half Period RMS 250 – 300MHz) 40 ps (Half Period RMS 300 – 360MHz) Description The AK8122 is a high performance differential zero delay clock buffer IC with Phase Locked Loop (PLL). Target application is DDR2 SDRAM and characteristics of these ICs are acceptable to standards of JEDEC. Supply Voltage: 1.8 ±0.