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53C96 - AM53C96

Description

The High Performance SCSI Controller (HPSC) has a flexible three bus architecture.

The HPSC has a 16-bit DMA interface, an 8 bit host data interface and an 8-bit SCSI data interface.

The HPSC is designed to minimize host intervention by implementing common SCSI sequences in hardware.

Features

  • C/D TSEL I/O.
  • I/O + I/O SDC 1 SD 1.
  • SD 0 + SD 0 SDC 0 SD 0 AMD 75ALS170 ISEL ATN.
  • ATN + ATN SDC 2 SD 2.
  • SD 1 + SD 1.
  • SD 2 + SD 2.

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Datasheet preview – 53C96

Datasheet Details

Part number 53C96
Manufacturer AMD
File Size 353.34 KB
Description AM53C96
Datasheet download datasheet 53C96 Datasheet
Additional preview pages of the 53C96 datasheet.

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    Full PDF Text Transcription

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    PRELIMINARY Am53C94/Am53C96 High Performance SCSI Controller DISTINCTIVE CHARACTERISTICS s s s s s s s s s Pin/function compatible with NCR53C94/53C96 AMD’s Patented GLITCH EATERTM Circuitry on REQ and ACK inputs 5 Mbytes per second synchronous SCSI transfer rate 20 Mbytes per second DMA transfer rate 16-bit DMA Interface plus 2 bits of parity Flexible three bus architecture Single ended SCSI bus supported by Am53C94 Single ended and differential SCSI bus supported by Am53C96 Selection of multiplexed or non-multiplexed address and data bus s s s s s s s s Advanced Micro Devices High current drivers (48 mA) for direct connection to the single ended SCSI bus Supports Disconnect and Reselect commands Supports burst mode DMA operation with a threshold of 8 Supports 3-byte-tagged queuing as
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