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AN52. For precise diagrams, and layout, please refer to the original PDF.
$1[ ® $0,+* PLFURQ &026 *DWH $UUD Description AN5x is a family of AND-NOR circuits consisting of one 3-input AND gate and one 2-input AND gate into a 2-input NOR ga...
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of one 3-input AND gate and one 2-input AND gate into a 2-input NOR gate. Logic Symbol Truth Table A AN5x ABCDEQ B HHHXX L C Q XXXHHL D All other combinations H E Core Logic HDL Syntax Verilog .................... AN5x inst_name (Q, A, B, C, D, E); VHDL...................... inst_name: AN5x port map (Q, A, B, C, D, E); Pin Loading Pin Name A B C D E AN52 1.0 1.0 1.0 1.0 1.0 Equivalent Loads AN54 1.0 1.0 1.0 1.0 1.0 AN56 2.1 2.1 2.1 2.2 2.2 Size And Power Characteristics Power Characteristicsa Cell Equivalent Gates Static IDD (TJ = 85°C) (nA) EQLpd (Eq-load) AN52 4.0 TBD 8.0 AN54 5.0 TBD 9.4 AN56 12.0 TBD 18.6 a. See page 2