DF201 - CMOS Gate Array

AMI

General Description

DF20x is a family of static, master-slave, multiplexed scan D flip-flops without SET or RESET.

Output is unbuffered and changes state on the rising edge of the clock.

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Datasheet Details

Part number	DF201
Manufacturer	AMI
File Size	37.13 KB
Description	CMOS Gate Array
Datasheet	DF201 Datasheet

Full PDF Text Transcription for DF201 (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for DF201. For precise diagrams, and layout, please refer to the original PDF.

Core Logic ')[ ® $0,+* PLFURQ &026 *DWH $UUD Description DF20x is a family of static, master-slave, multiplexed scan D flip-flops without SET or RESET. Output is u...

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slave, multiplexed scan D flip-flops without SET or RESET. Output is unbuffered and changes state on the rising edge of the clock. Logic Symbol Truth Table DF20x DQ C SD SE C D SD SE Q ↑HX LH ↑LXLL ↑ XHHH ↑XLHL L X X X NC NC = No Change HDL Syntax Verilog .................... DF20x inst_name (Q, C, D, SD, SE); VHDL...................... inst_name: DF20x port map (Q, C, D, SD, SE); Pin Loading Pin Name C D SD SE Equivalent Loads DF201 DF202 1.0 1.0 1.0 1.0 1.0 1.0 2.1 2.1 Size And Power Characteristics Cell Equivalent Gates Power Characteristicsa Static IDD (TJ = 85°C) (nA) EQLpd (Eq-load) DF201 8.0 TBD 18.1 DF202 9.0 TBD 1

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