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DF202 - CMOS Gate Array

Download the DF202 datasheet PDF. This datasheet also covers the DF201 variant, as both devices belong to the same cmos gate array family and are provided as variant models within a single manufacturer datasheet.

General Description

DF20x is a family of static, master-slave, multiplexed scan D flip-flops without SET or RESET.

Output is unbuffered and changes state on the rising edge of the clock.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (DF201-AMI.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number DF202
Manufacturer AMI
File Size 37.13 KB
Description CMOS Gate Array
Datasheet download datasheet DF202 Datasheet

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Other Datasheets by AMI

Part Number Description
DF201 CMOS Gate Array
DF211 CMOS Gate Array
DF221 CMOS Gate Array
DF231 CMOS Gate Array

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
Core Logic ')[ ® $0,+*  PLFURQ &026 *DWH $UUD Description DF20x is a family of static, master-slave, multiplexed scan D flip-flops without SET or RESET. Output is unbuffered and changes state on the rising edge of the clock. Logic Symbol Truth Table DF20x DQ C SD SE C D SD SE Q ↑HX LH ↑LXLL ↑ XHHH ↑XLHL L X X X NC NC = No Change HDL Syntax Verilog .................... DF20x inst_name (Q, C, D, SD, SE); VHDL...................... inst_name: DF20x port map (Q, C, D, SD, SE); Pin Loading Pin Name C D SD SE Equivalent Loads DF201 DF202 1.0 1.0 1.0 1.0 1.0 1.0 2.1 2.1 Size And Power Characteristics Cell Equivalent Gates Power Characteristicsa Static IDD (TJ = 85°C) (nA) EQLpd (Eq-load) DF201 8.0 TBD 18.1 DF202 9.0 TBD 19.8 a.