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MX41 - CMOS Gate Array

General Description

MX4x is a family of four-to-one digital multiplexers.

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Datasheet Details

Part number MX41
Manufacturer AMI
File Size 35.50 KB
Description CMOS Gate Array
Datasheet download datasheet MX41 Datasheet

Full PDF Text Transcription for MX41 (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for MX41. For precise diagrams, and layout, please refer to the original PDF.

Core Logic 0;[ ® $0,+*  PLFURQ &026 *DWH $UUD Description MX4x is a family of four-to-one digital multiplexers. Logic Symbol MX4x S1 S0 |3 |2 Q |1 |0 Truth Table I0 ...

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al multiplexers. Logic Symbol MX4x S1 S0 |3 |2 Q |1 |0 Truth Table I0 I1 I2 LXX HXX XLX XHX XXL XXH XXX XXX I3 S1 S0 XLL XLL XLH XLH XHL XHL L HH HHH Q L H L H L H L H HDL Syntax Verilog .................... MX4x inst_name (Q, I0, I1, I2, I3, S0, S1); VHDL...................... inst_name: MX4x port map (Q, I0, I1, I2, I3, S0, S1); Pin Loading Pin Name I0 I1 I2 I3 S0 S1 MX41 1.0 1.0 1.0 1.0 3.3 3.3 Equivalent Loads MX42 MX44 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 3.3 3.3 2.1 2.1 MX46 1.0 1.0 1.0 1.0 3.3 2.

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