* CAS Latency and Frequency CAS Latency 2 2.5 3 Maximum Operating Frequency (MHz) DDR400 (5) 133 166 200
* Double data rate architecture: two data transfers per clock cycle.
* Bidirectional data strobe (DQS) is transmitted and received with data, to be used in capturing data at the
A48P3616B
AMIC
1.45 MB
8m x 16-bit ddr dram.
Document Title 8M X 16 Bit DDR DRAM Revision History Rev. No. History 1.0 Initial issue A48P3616B 8M X 16 Bit DDR DRAM Issue Date January 2, 2014 R.
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