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APW7116 Datasheet Preview

APW7116 Datasheet

3-in-1 Dual PWM Buck and Linear DDR Power Controller

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APW7116
3-in-1 Dual PWM Buck and Linear DDR Power Controller
Features
Provide Synchronous Rectified Buck
PWM Controllers for VDDQ and VMCH
Integrated Power FETs with VTT Regulator
Source/Sink up to 2.0A
Drive Low Cost N-Channel Power MOSFETs
Internal 0.8V Reference Voltage for Adjustable
VDDQ and VMCH
Thermal Shutdown
VTT Tracks at Half the Reference Voltage
Fixed Switching Frequency of 250kHz for
VDDQ and VMCH
Over Current Protection and Under Voltage
Protection for VDDQ and VMCH
Fully Complies with ACPI Power Sequencing
Specifications
180 degrees Phase Shift between VDDQ and
VMCH
Power Okay Function for VDDQ and VMCH
Fast Transient Response
- Maximum Duty Cycle 90%
- High-Bandwidth Error Amplifier
Simple single-Loop Control Design
- Voltage Mode PWM Control
- External Compensation
External Soft-Start for VDDQ and VMCH
Shutdown Function for VDDQ/VTT and VMCH
Thermally Enhanced TSSOP-24 Package
Lead Free Available (RoHS Compliant)
General Description
The APW7116 integrates Dual PWM buck controllers
and an internal linear regulator for DDR memory and
MCH power solution. The two synchronous PWM buck
controllers drive four N-channel MOSFETs for DDR
memory supply voltage (VDDQ) and MCH regulator.
The internal regulator is designed to track at the half
of the reference voltage with sourcing and sinking
current for DDR memory termination regulator (VTT).
The APW7116 uses the latched BUF_Cut signal and
the POR of the BOOT to comply with ACPI power
sequencing specifications. The two PWM regulators also
provide POK signals to indicate the regulators are
good. The device also has the phase shift function
between the two PWM controllers. The protection
functions of the two PWM controllers include over
current protection, under voltage protection and
external soft-start function. The VTT regulator provides
2A sinking and sourcing current limit function and also
has thermal shutdown protection.
The TSSOP-24-P package with a copper pad provides
excellent thermal impedance is available.
Applications
DDR Memory and MCH Power Supply
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise
customers to obtain the latest version of relevant information to verify before placing orders.
Copyright © ANPEC Electronics Corp.
1
Rev. A.2 - Jul., 2006
www.anpec.com.tw




ANPEC

APW7116 Datasheet Preview

APW7116 Datasheet

3-in-1 Dual PWM Buck and Linear DDR Power Controller

No Preview Available !

APW7116
Pinout
COMP1 1
FB1 2
SS1/EN1 3
VTTGND 4
VTT 5
VDDQ 6
AGND 7
VTTFB 8
REFSEN 9
FB2 10
SS2/EN2 11
POK2 12
GND
BOTTOM
SIDE PAD
TSSOP-24-P
TOP VIEW
24 PHASE1
23 LGATE1
22 UGATE1
21 BOOT
20 VCC
19 COMP2
18 BUF_CUT
17 UGATE2
16 LGATE2
15 GND
14 PHASE2
13 POK1
Ordering and Marking Information
APW7116
Lead Free Code
Handling Code
Temp. Range
Package Code
Package Code
R : TSSOP-24-P
Operating Ambient Temp. Range
E : - 20 to 70 °C
Handling Code
TU : Tube
TR : Tape & Reel
TY : Tray
Lead Free Device
L : Lead Free Device Blank : Original Device
APW7116 R :
APW7116
XXXXX
XXXXX - Date Code
Note: ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate
termination finish; which are fully compliant with RoHS and compatible with both SnPb and lead-free soldiering
operations. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J STD-020C
for MSL classification at lead-free peak reflow temperature.
Copyright © ANPEC Electronics Corp.
2
Rev. A.2 - Jul., 2006
www.anpec.com.tw



Part Number APW7116
Description 3-in-1 Dual PWM Buck and Linear DDR Power Controller
Maker ANPEC
Total Page 3 Pages
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