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AT32F421 - 32-bit MCU

General Description

9 2 Functionality overview 11 2.1 ARM®Cortex®-M4 11 2.2 Memory 12 2.2.1 Internal Flash memory 12 2.2.2 Memory protection unit (MPU) 12 2.2.3 Embedded SRAM12 2.3 Interrupts 12 2.3.1 Nested vectored interrupt controller (NVIC)12 2.3.2 External interrupts (EXINT) 12 2.4 Power control (PWC) 1

Key Features

  • Core: ARM® 32-bit Cortex®-M4 CPU.
  • 120 MHz maximum frequency, with a memory protection unit (MPU), single-cycle multiplication and hardware division.
  • DSP instructions.
  • Memories.
  • 16 to 64 KB of internal Flash memory.
  • 4 Kbytes of boot memory used as a Bootloader.
  • sLib: configurable part of main Flash set as a library area with code executable but secured, non-readable.
  • 8 to 16 Kbytes of SRAM.
  • Power control (PWC).
  • 2.4 to.

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Datasheet Details

Part number AT32F421
Manufacturer ARTERY
File Size 2.37 MB
Description 32-bit MCU
Datasheet download datasheet AT32F421 Datasheet

Full PDF Text Transcription for AT32F421 (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for AT32F421. For precise diagrams, and layout, please refer to the original PDF.

AT32F421 Series Datasheet ARM®-based 32-bit Cortex®-M4 MCU with 16 KB to 64 KB Flash, sLib, 10 timers, 1 ADC, 1 CMP, 7 communication interfaces Features  Core: ARM® 32-b...

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s, 1 ADC, 1 CMP, 7 communication interfaces Features  Core: ARM® 32-bit Cortex®-M4 CPU − 120 MHz maximum frequency, with a memory protection unit (MPU), single-cycle multiplication and hardware division − DSP instructions  Memories − 16 to 64 KB of internal Flash memory − 4 Kbytes of boot memory used as a Bootloader − sLib: configurable part of main Flash set as a library area with code executable but secured, non-readable − 8 to 16 Kbytes of SRAM  Power control (PWC) − 2.4 to 3.