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ASIX

AX88190P Datasheet Preview

AX88190P Datasheet

PCMCIA Fast Ethernet MAC Controller

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Features
AX88190P
PCMCIA Fast Ethernet MAC Controller
10/100BASE PCMCIA Fast Ethernet MAC Controller
Document No.: AX190-15 / V1.5 / Nov. 09 ’99
IEEE 802.3u 100BASE-T, TX, and T4 Compatible
Single chip PCMCIA bus 10/100Mbps Fast
Ethernet MAC Controller
NE2000 register level compatible instruction
Compliant with 16 bit PC Card Standard -
February 1995
Support both 10Mbps and 100Mbps data rate
Support both full-duplex or half-duplex operation
Provides a MII port for both 10/100Mbps operation
Support 256/512 bytes EEPROM (used for saving
CIS)
Support automatic loading of Ethernet ID, CIS and
Adapter Configuration from EEPROM on power-
on initialization
External and internal loop-back capability
128-pin LQFP low profile package
25MHz Operation, Dual 5V and 3.3V CMOS
process with 5V I/O tolerance. Or pure 3.3V
operation
*IEEE is a registered trademark of the Institute of Electrical and Electronic
Engineers, Inc.
*All other trademarks and registered trademark are the property of their
respective holders.
Product description
The AX88190 Fast Ethernet Controller is a high performance PCMCIA bus Ethernet Controller. The AX88190
contains a 16 bit PCMCIA interfaces to host CPU and compliant with PC Card Standard – February 1995. The
AX88190 implements both 10Mbps and 100Mbps Ethernet function based on IEEE802.3 / IEEE802.3u LAN
standard. The AX88190 supports 10Mbps/100Mbps media-independent interface (MII) to simplify the design. The
AX88190 is built in interface to connect FAX/MODEM chipset with parallel bus interface.
System Block Diagram
RJ11
DAA
MODEM
RJ45
MAGNETIC
PHY/TxRx
AX88190
EEPROM
SRAM
PCMCIA I/F
Always contact ASIX for possible updates before starting a design.
This data sheet contains new products information. ASIX ELECTRONICS reserves the rights to modify product specification without notice. No liability
is assumed as a result of the use of this product. No rights under any patent accompany the sale of the product.
ASIX ELECTRONICS CORPORATION
Frist Released Date : Oct/02/1998
2F, NO.13, Industry East Rd. II, Science-based Industrial Park, Hsin-Chu City, Taiwan, R.O.C.
TEL: 886-3-579-9500
FAX: 886-3-579-9558
http://www.asix.com.tw




ASIX

AX88190P Datasheet Preview

AX88190P Datasheet

PCMCIA Fast Ethernet MAC Controller

No Preview Available !

AX88190
PCMCIA Fast Ethernet MAC Controller
CONTENTS
1.0 INTRODUCTION ...............................................................................................................................................5
1.1 GENERAL DESCRIPTION: .....................................................................................................................................5
1.2 AX88190 BLOCK DIAGRAM:...............................................................................................................................5
1.3 AX88190 PIN CONNECTION DIAGRAM ................................................................................................................6
2.0 SIGNAL DESCRIPTION....................................................................................................................................7
2.1 PCMCIA BUS INTERFACE SIGNALS GROUP .........................................................................................................7
2.2 EEPROM SIGNALS GROUP .................................................................................................................................8
2.3 MII INTERFACE SIGNALS GROUP ..........................................................................................................................8
2.4 MODEM INTERFACE PINS GROUP ..........................................................................................................................9
2.5 SRAM INTERFACE PINS GROUP ...........................................................................................................................9
2.6 MISCELLANEOUS PINS GROUP ............................................................................................................................10
2.7 POWER ON CONFIGURATION SETUP SIGNALS CROSS REFERENCE TABLE .................................................................10
3.0 MEMORY AND I/O MAPPING .....................................................................................................................11
3.1 EEPROM MEMORY MAPPING ..........................................................................................................................11
3.2 ATTRIBUTE MEMORY MAPPING.........................................................................................................................11
3.3 I/O MAPPING....................................................................................................................................................12
3.4 SRAM MEMORY MAPPING ...............................................................................................................................12
4.0 REGISTERS OPERATION..............................................................................................................................13
4.1 PCMCIA FUNCTION CONFIGURATION REGISTER SET OF LAN............................................................................13
4.1.1 Configuration Option Register of LAN (LCOR) Offset 3C0H (Read/Write)...............................................14
4.1.2 Configuration and Status Register of LAN (LCSR) Offset 3C2H (Read/Write) ..........................................15
4.1.3 I/O Base Register 0/1 of LAN (LIOBASE0/1) Offset 3CAH/3CCH (Read/Write) .......................................15
4.2 PCMCIA FUNCTION CONFIGURATION REGISTER SET OF MODEM.....................................................................16
4.2.1 Configuration Option Register of MODEM (MCOR) Offset 3E0H (Read/Write).......................................16
4.2.2 Configuration and Status Register of MODEM (MCSR) Offset 3E2H (Read/Write) ..................................17
4.2.3 I/O Base Register 0/1 of MODEM (MIOBASE0/1) Offset 3EAH/3ECH (Read/Write) ...............................17
4.3 REGISTERS OPERATION .....................................................................................................................................18
4.3.1 Command Register (CR) Offset 00H (Read/Write)....................................................................................20
4.3.2 Interrupt Status Register (ISR) Offset 07H (Read/Write)...........................................................................20
4.3.3 Interrupt mask register (IMR) Offset 0FH (Write) ....................................................................................21
4.3.4 Data Configuration Register (DCR) Offset 0EH (Write)...........................................................................21
4.3.5 Transmit Configuration Register (TCR) Offset 0DH (Write) .....................................................................21
4.3.6 Transmit Status Register (TSR) Offset 04H (Read) ...................................................................................22
4.3.7 Receive Configuration (RCR) Offset 0CH (Write) ....................................................................................22
4.3.8 Receive Status Register (RSR) Offset 0CH (Read) ....................................................................................22
4.3.9 Inter-frame gap (IFG) Offset 16H (Read/Write)........................................................................................22
4.3.10 Inter-frame gap Segment 1(IFGS1) Offset 12H (Read/Write)..................................................................23
4.3.11 Inter-frame gap Segment 2(IFGS2) Offset 13H (Read/Write)..................................................................23
4.3.12 MII/EEPROM Management Register (MEMR) Offset 14H (Read/Write) .................................................23
4.3.13 Test Register (TR) Offset 15H (Write).....................................................................................................23
5.0 PCMCIA DEVICE ACCESS FUNCTIONS ....................................................................................................24
5.1 ATTRIBUTE MEMORY ACCESS FUNCTION FUNCTIONS. .........................................................................................24
5.2 I/O ACCESS FUNCTION FUNCTIONS. ....................................................................................................................24
6.0 ELECTRICAL SPECIFICATION AND TIMINGS .......................................................................................25
6.1 ABSOLUTE MAXIMUM RATINGS.........................................................................................................................25
6.2 GENERAL OPERATION CONDITIONS ...................................................................................................................25
6.3 DC CHARACTERISTICS......................................................................................................................................25
2
ASIX ELECTRONICS CORPORATION


Part Number AX88190P
Description PCMCIA Fast Ethernet MAC Controller
Maker ASIX
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