ATmega644RFR2 Datasheet | Atmel

Features - Network support by hardware assisted Multiple PAN Address Filtering - Advanced Hardware assisted Reduced Power Consumption - High Performance, Low Power AVR® 8-Bit Microcontroller - Advanced RISC Architecture - 135 Powerful Instructions - Most Single Clock Cycle Execution - 32x8 General Purpose Working Registers / On-Chip 2-cycle Multiplier - Up to 16 MIPS Throughput at 16 MHz and 1.8V - Fully Static Operation - Non-volatile Program and Data Memories - 256K/128K/64K Bytes of In-System Self-Programmable Flash - Endurance: 10’000 Write/Erase Cycles @ 125°C (25’000 Cycles @ 85°C) - 8K/4K/2K Bytes EEPROM - Endurance: 20’000 Write/Erase Cycles @ 125°C (100’000 Cycles @ 25°C) - 32K/16K/8K Bytes Internal SRAM - JTAG (IEEE std. 1149.1 pliant) Interface - Boundary-scan Capabilities According to the JTAG Standard - Extensive On-chip Debug Support - Programming of Flash EEPROM, Fuses and Lock Bits through the JTAG interface - Peripheral Features - Multiple Timer/Counter & PWM channels - Real Time Counter with Separate Oscillator - 10-bit, 330 ks/s A/D Converter; Analog parator; On-chip Temperature Sensor - Master/Slave SPI Serial Interface - Two Programmable Serial USART - Byte Oriented 2-wire Serial Interface - Advanced Interrupt Handler and Power Save Modes - Watchdog Timer with Separate On-Chip Oscillator - Power-on Reset and Low Current Brown-Out Detector - Fully integrated Low Power Transceiver for 2.4 GHz ISM Band - High Power Amplifier support by TX spectrum side lobe suppression - Supported Data Rates: 250 kb/s and 500 kb/s, 1 Mb/s, 2 Mb/s - -100 d Bm RX Sensitivity; TX Output Power up to 3.5 d Bm - Hardware Assisted MAC (Auto-Acknowledge, Auto-Retry) - 32 Bit IEEE 802.15.4 Symbol Counter - SFD-Detection, Spreading; De-Spreading; Framing ; CRC-16 putation - Antenna Diversity and TX/RX control / TX/RX 128 Byte Frame Buffer - PLL synthesizer with 5 MHz and 500 k Hz channel spacing for 2.4 GHz ISM Band - Hardware Security (AES, True Random...