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Atmel Electronic Components Datasheet

AT25F512B Datasheet

512-Kilobit 2.7-volt Minimum SPI Serial Flash Memory

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Features
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Serial Peripheral Interface (SPI) Compatible
– Supports SPI Modes 0 and 3
70 MHz Maximum Operating Frequency
– Clock-to-Output (tV) of 6 ns Maximum
Flexible, Optimized Erase Architecture for Code + Data Storage Applications
– Uniform 4-Kbyte Block Erase
– Uniform 32-Kbyte Block Erase
– Full Chip Erase
Hardware Controlled Locking of Protected Sectors via WP Pin
128-Byte Programmable OTP Security Register
Flexible Programming
– Byte/Page Program (1 to 256 Bytes)
Fast Program and Erase Times
– 2.5 ms Typical Page Program (256 Bytes) Time
– 100 ms Typical 4-Kbyte Block Erase Time
– 500 ms Typical 32-Kbyte Block Erase Time
Automatic Checking and Reporting of Erase/Program Failures
JEDEC Standard Manufacturer and Device ID Read Methodology
Low Power Dissipation
– 6 mA Active Read Current (Typical at 20 MHz)
– 5 µA Deep Power-Down Current (Typical)
Endurance: 100,000 Program/Erase Cycles
Data Retention: 20 Years
Complies with Full Industrial Temperature Range
Industry Standard Green (Pb/Halide-free/RoHS Compliant) Package Options
– 8-lead SOIC (150-mil Wide)
– 8-pad Ultra Thin DFN (2 x 3 x 0.6 mm)
1. Description
The AT25F512B is a serial interface Flash memory device designed for use in a wide
variety of high-volume consumer based applications in which program code is shad-
owed from Flash memory into embedded or external RAM for execution. The flexible
erase architecture of the AT25F512B, with its erase granularity as small as 4 Kbytes,
makes it ideal for data storage as well, eliminating the need for additional data storage
EEPROM devices.
The erase block sizes of the AT25F512B have been optimized to meet the needs of
today's code and data storage applications. By optimizing the size of the erase blocks,
the memory space can be used much more efficiently. Because certain code modules
and data storage segments must reside by themselves in their own erase regions, the
wasted and unused memory space that occurs with large sectored and large block
erase Flash memory devices can be greatly reduced. This increased memory space
efficiency allows additional code routines and data storage segments to be added
while still maintaining the same overall device density.
The device also contains a specialized OTP (One-Time Programmable) Security Reg-
ister that can be used for purposes such as unique device serialization, system-level
Electronic Serial Number (ESN) storage, locked key storage, etc.
Specifically designed for use in 3-volt systems, the AT25F512B supports read, pro-
gram, and erase operations with a supply voltage range of 2.7V to 3.6V. No separate
voltage is required for programming and erasing.
512-Kilobit
2.7-volt
Minimum
SPI Serial Flash
Memory
AT25F512B
Preliminary
3689C–DFLASH–12/08


Atmel Electronic Components Datasheet

AT25F512B Datasheet

512-Kilobit 2.7-volt Minimum SPI Serial Flash Memory

No Preview Available !

2. Pin Descriptions and Pinouts
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Symbol Name and Function
Asserted
State
CHIP SELECT: Asserting the CS pin selects the device. When the CS pin is deasserted, the
device will be deselected and normally be placed in standby mode (not Deep Power-Down
mode), and the SO pin will be in a high-impedance state. When the device is deselected,
data will not be accepted on the SI pin.
CS
A high-to-low transition on the CS pin is required to start an operation, and a low-to-high
Low
transition is required to end an operation. When ending an internally self-timed operation
such as a program or erase cycle, the device will not enter the standby mode until the
completion of the operation.
SCK
SERIAL CLOCK: This pin is used to provide a clock to the device and is used to control the
flow of data to and from the device. Command, address, and input data present on the SI pin
is always latched in on the rising edge of SCK, while output data on the SO pin is always
clocked out on the falling edge of SCK.
-
SERIAL INPUT: The SI pin is used to shift data into the device. The SI pin is used for all data
input including command and address sequences. Data on the SI pin is always latched in on
SI the rising edge of SCK.
-
Data present on the SI pin will be ignored whenever the device is deselected (CS is
deasserted).
SERIAL OUTPUT: The SO pin is used to shift data out from the device. Data on the SO pin
is always clocked out on the falling edge of SCK.
SO
The SO pin will be in a high-impedance state whenever the device is deselected (CS is
-
deasserted).
WP
HOLD
WRITE PROTECT: The WP pin controls the hardware locking feature of the device. Please
refer to “Protection Commands and Features” on page 11 for more details on protection
features and the WP pin.
The WP pin is internally pulled-high and may be left floating if hardware controlled protection
will not be used. However, it is recommended that the WP pin also be externally connected
to VCC whenever possible.
HOLD: The HOLD pin is used to temporarily pause serial communication without
deselecting or resetting the device. While the HOLD pin is asserted, transitions on the SCK
pin and data on the SI pin will be ignored, and the SO pin will be in a high-impedance state.
The CS pin must be asserted, and the SCK pin must be in the low state in order for
a Hold condition to start. A Hold condition pauses serial communication only and
does not have an effect on internally self-timed operations such as a program or
erase cycle. Please refer to “Hold” on page 24 for additional details on the Hold
operation.
Low
Low
The HOLD pin is internally pulled-high and may be left floating if the Hold function will not be
used. However, it is recommended that the HOLD pin also be externally connected to VCC
whenever possible.
DEVICE POWER SUPPLY: The VCC pin is used to supply the source voltage to the device.
VCC Operations at invalid VCC voltages may produce spurious results and should not be
-
attempted.
GND
GROUND: The ground reference for the power supply. GND should be connected to the
system ground.
-
Type
Input
Input
Input
Output
Input
Input
Power
Power
2 AT25F512B [Preliminary]
3689C–DFLASH–12/08


Part Number AT25F512B
Description 512-Kilobit 2.7-volt Minimum SPI Serial Flash Memory
Maker ATMEL Corporation
Total Page 30 Pages
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