AT91SAM7L128
Key Features
- Internal High-speed SRAM, Single-cycle Access at Maximum Speed - 6 Kbytes
- 2 Kbytes Directly on Main Supply That Can Be Used as Backup SRAM
- 4 Kbytes in the Core
- Memory Controller (MC) - Enhanced Embedded Flash Controller, Abort Status and Misalignment Detection
- Clock Generator (CKGR) - Low-power 32 kHz RC Oscillator, 32 kHz On-chip Oscillator, 2 MHz Fast RC Oscillator and one PLL
- Supply Controller (SUPC) - Minimizes Device Power Consumption - Manages the Different Supplies On Chip - Supports Multiple Wake-up Sources
- Power Management Controller (PMC) - Software Power Optimization Capabilities, Including Active and Four Low Power Modes
- Idle Mode: No Processor Clock
- Wait Mode: No Processor Clock, Voltage Regulator Output at Minimum
- Backup Mode: Voltage Regulator and Processor Switched Off
