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ATR0663 - SOC

General Description

The ATR0663 is based on an ARM926EJ-S processor with an integrated high-performance GPS engine and a rich peripheral set to provide a system level solution that minimizes space, power, and number of additional components required for the implementation of GPS-enabled products.

Key Features

  • Incorporates the ARM926EJ-S™ ARM® Thumb® Processor.
  • DSP Instruction Extensions, ARM Jazelle® Technology for Java® Acceleration.
  • 16-Kbyte Data Cache, 16-Kbyte Instruction Cache, Write Buffer.
  • 220 MIPS at 200 MHz (1.1 MIPS/MHz).
  • Memory Management Unit.
  • Embedded ICE In-circuit Emulation, Debug Communication Channel Support.
  • Mid-level Implementation Embedded Trace Macrocell™ GPS Engine.
  • GPS Engine with Massive Parallel Correlat.

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The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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www.DataSheet4U.com Features • Incorporates the ARM926EJ-S™ ARM® Thumb® Processor – DSP Instruction Extensions, ARM Jazelle® Technology for Java® Acceleration – 16-Kbyte Data Cache, 16-Kbyte Instruction Cache, Write Buffer – 220 MIPS at 200 MHz (1.1 MIPS/MHz) – Memory Management Unit – Embedded ICE In-circuit Emulation, Debug Communication Channel Support – Mid-level Implementation Embedded Trace Macrocell™ GPS Engine – GPS Engine with Massive Parallel Correlation – Highest Acquisition and Tracking Sensitivity – Fast Time To First Fix (TTFF) – SBAS Support (WAAS, EGNOS) – NMEA 2.2 Data Format Bus Matrix – Nine 32-bit-layer Matrix, Allowing a Total of 28.