TSC695F
Description
The TSC695F (ERC32 Single-Chip) is a highly integrated, high-performance 32-bit RISC embedded processor implementing the SPARC architecture V7 specification.
Key Features
- Integer Unit Based on SPARC V7 High-performance RISC Architecture
- Optimized Integrated 32/64-bit Floating-point Unit
- Speed Optimized Code RAM Interface 8- or 40-bit boot-PROM (Flash) Interface
- IEEE 1149.1 Test Access Port (TAP) for Debugging and Test Purposes
- Fully Static Design
- Performance: 12 MIPs/3 MFlops (Double Precision) at SYSCLK = 15 MHz
- Core Consumption: 1.0W Typ. at 20 MIPs/0.7W typ. at 10 MIPs
- Total Dose Radiation Capability (Parametric and Functional): 300 KRADs (Si)
- SEU Event Rate Better than 3 E-8 Error/ponent/Day (Worst Case)
- Latch-up Immunity Better than (LET) 100 MeV-cm2/mg
