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AMMC-2008 Datasheet Preview

AMMC-2008 Datasheet

DC - 50 GHz SPDT Switch

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AMMC-2008
DC – 50 GHz SPDT Switch
Data Sheet
Chip Size:
Chip Size Tolerance:
Chip Thickness:
Pad Dimensions:
930 x 630 µm (36.6 x 24.8 mils)
±10 µm (±0.4 mils)
100 ± 10 µm (4 ± 0.4 mils)
80 x 80 µm (3.2 x 3.2 mils)
Description
Avago’s AMMC-2008 is a monolithic PHEMT SPDT switch
with low insertion loss and high isolation from DC to 50
GHz. This MMIC is designed for general-purpose applica-
tions. For ­improved reliability and moisture protection,
the die is passivated at the ­active areas. One series and
two shunt PHEMTs per throw provide 2.0 dB insertion loss
and 28 dB isolation at 40 GHz.
Absolute Maximum Ratings[1]
Symbol Parameters/Conditions
Units Min. Max.
Vsel
Pin
Tb
Tstg
Tmax
Select Voltages 1 & 2 V -8
RF Input Power
dBm
Die Backside Temperature °C
Storage Temperature °C -65
Max. Assembly Temp
(60 sec max)
°C
+1.4
+20
+140
+165
+300
Note:
1. Operation in excess of any one of these conditions may result in
permanent damage to this device.
Features
Wide frequency range: DC – 50 GHz
Single pole double throw switch
Low insertion loss: 2.3 dB (max.) at 40 GHz
High isolation: 25 dB (min.) at 40 GHz
Medium input power: P-1dB: +14 dBm
Applications
Instrumentation
Communications
Radar
ECM
EW
Fiber optics
Pulse modulation
Port isolation
Transfer switching
High speed switching
Replacement of mechanical switches




AVAGO

AMMC-2008 Datasheet Preview

AMMC-2008 Datasheet

DC - 50 GHz SPDT Switch

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AMMC-2008 DC Specifications[1]
Symbol Parameters and Test Conditions
Isel1 Leakage Current at Vsel1 = +0 V, Vsel2 = -3 V
Isel1 Leakage Current at Vsel1 = -3 V, Vsel2 = +0 V
Isel2 Leakage Current at Vsel2 = +0 V, Vsel1 = -3 V
Isel2 Leakage Current at Vsel2 = -3 V, Vsel1 = +0 V
Note:
1. Backside temperature Tb = 25°C unless otherwise noted.
Units Min. Typ.
µA
µA -20
µA
µA -20
Max.
20
20
RF Specifications[1,2] (Zin = Zout = 50Ω, Vsel1 = -3V, Vsel2 = 0V)
Symbol Parameters and Test Conditions
Freq.
Units Min. Typ. Max.
IL Insertion Loss, RFin to RFout (ON throw)
2 GHz
dB
25 GHz
40 GHz
ISO Isolation, RFin to RFout (OFF throw)
2 GHz
dB
25 GHz
40 GHz
46
30
25
RLin Input Return Loss
2 GHz
dB
40 GHz
15
15
RLout-on
Output Return Loss (ON throw)
2 GHz
dB
40 GHz
15
15
RLout-off
Output Return Loss (OFF throw)
2 GHz
dB
40 GHz
P-1dB
Input Power at 1 dB Gain Compression
H2 2nd Harmonic, Pout = +5 dBm
25 GHz
dBm
2 GHz
dBc
12 GHz
H3 3rd Harmonic, Pout = +5 dBm
2 GHz
dBc
12 GHz
IP3 Input 3rd Order Intercept Point,
dBm
RFin1=RFin2 = +5 dBm, f = 2 MHz
2 GHz
12 GHz
Control Switching Speed[3]
10% – 90% rise time
90% – 10% fall time
ps
ps
1.6
1.6
2.0
49
35
28
16.5
23
16.5
18
4.5
4.5
+14
-48
-43
-60
-60
+27
+27
100
90
2
2
2.3
-45
-40
-50
-50
+32
+32
Notes:
1. Data measured in wafer form, Tchuck= 25°C.
2. 100% on-wafer RF test is done at frequency = 2, 10, 20, 30 and 40 GHz, except as noted.
3. Typical Vsel switching speed measured using Pulse Generator Model PG5000A. Measurement limited to rise/fall time of Pulse Generator.



Part Number AMMC-2008
Description DC - 50 GHz SPDT Switch
Maker AVAGO
Total Page 7 Pages
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