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HCTL2021 - (HCTL2017 / HCTL2021) Quadrature Decoder/Counter Interface ICs

Description

The HCTL-2021/2017 is CMOS ICs that performs the quadrature decoder, counter, and bus interface function.

The HCTL-2021/2017 is designed to improve system performance in digital closed loop motion control systems and digital data input systems.

Features

  • Interfaces Encoder to Microprocessor.
  • 33 MHz Clock Operation.
  • High Noise Immunity: Schmitt Trigger Inputs and Digital Noise Filter.
  • 16-Bit Binary Up/Down Counter.
  • Latched Outputs.
  • 8-Bit Tristate Interface.
  • 8 or 16-Bit Operating Modes.
  • Quadrature Decoder Output Signals, Up/Down and Count.
  • Cascade Output Signals, Up/Down and Count.
  • Substantially Reduced System Software.
  • 5V Operation (VDD.
  • V.

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Datasheet preview – HCTL2021

Datasheet Details

Part number HCTL2021
Manufacturer AVAGO TECHNOLOGIES
File Size 209.91 KB
Description (HCTL2017 / HCTL2021) Quadrature Decoder/Counter Interface ICs
Datasheet download datasheet HCTL2021 Datasheet
Additional preview pages of the HCTL2021 datasheet.

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Full PDF Text Transcription

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www.DataSheet4U.com HCTL-2017 and HCTL-2021 Quadrature Decoder/Counter Interface ICs Data Sheet Description The HCTL-2021/2017 is CMOS ICs that performs the quadrature decoder, counter, and bus interface function. The HCTL-2021/2017 is designed to improve system performance in digital closed loop motion control systems and digital data input systems. It does this by shifting time intensive quadrature decoder functions to a cost effective hardware solution. The HCTL-2021/2017 consists of a quadrature decoder logic, a binary up/down state counter, and an 8-bit bus interface. The use of Schmitt-triggered CMOS inputs and input noise filters allows reliable operation in noisy environments. The HCTL-2021/2017 contains 16-bit counter and provides TLL/CMOS compatible tri-state output buffers.
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