M6759 Datasheet | Acer Laboratories

Features < 8051 instruction set patible 8-bit microcontroller < 8051/8052 patible pinout < plete static design, wide range of operation frequency from 1 ~ 40 MHz < Large on-chip memory - 64K bytes built-in Multiple Times Programmable ROM (MTP-ROM) program memory - 512 bytes on-chip SRAM, expandable external 64K bytes address space < Dual Data Pointer < Four 8-bit bi-directional I/O ports < 6 interrupts including 2 external sources < One full-duplex serial UART ports patible with standard 8052 < Three 16 bit timer/counters < On chip oscillator for crystal < Software Power-Down mode, supports Idle mode and Power Down mode for less power consumption < ROM Code Protection < 4.5V~5.5V operation voltage, 12V programming voltage < 44-pin PLCC or QFP package 1.1 General Description The M6759 is an 8032/8052 instruction patible 8-bit microcontroller with MTP Flash ROM for firmware updating. By bining a versatile 8-bit CPU with MTP-Flash, this device provides whole microcontroller system on one chip and still remains the feasibility for general control systems in a variety of applications. Furthermore, user-defined security registers can protect the firmware after the code is ready. The M6759 contains the following: a) a non-volatile 64K bytes Multiple Times Programmable ROM program memory. b) a volatile 512 bytes read/write data memory c) four 8-bit I/O ports, two 16-bit timer/event counters (identical to the timers of the 80C51). d) a 16-bit timer (identical to the Timer 2 of the 8052). e) a multi-source two-priority-level nested interrupt structure. f) one serial interface (UART) and g) an on-chip oscillator. Ver. 1.01, Document Number : 6759DS02.doc Acer Labs: 11F, no. 45 Tung Hsing Road, Taipei 110, Taiwan, R.O.C. Tel: 886-2-8768-2800 Fax: 886-2-8768-3030 Homepage : .ali..tw Page 1 --Proprietary, Confidential, Preliminary-- Acer Laboratories Inc. M6759: 8 bit MTP Micro-controller Table of Contents: Section 1 : Features .................................................