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A6801 - DABiC-5 Latched Sink Drivers

Download the A6801 datasheet PDF. This datasheet also covers the A6800 variant, as both devices belong to the same dabic-5 latched sink drivers family and are provided as variant models within a single manufacturer datasheet.

General Description

The A6800 and A6801 latched-input BiMOS ICs merge high-current, high-voltage outputs with CMOS logic.

The CMOS input section consists of 4 or 8 data (D type) latches with associated common CLEAR, STROBE, and OUTPUT ENABLE circuitry.

The power outputs are bipolar NPN Darlingtons.

Key Features

  • 3.3 to 5 V logic supply range.
  • Up to 10 MHz data input rate.
  • High-voltage, high-current outputs.
  • Darlington current-sink outputs, with improved low-saturation voltages.
  • CMOS, TTL compatible inputs.
  • Output transient protection.
  • Internal pull-down resistors.
  • Low-power CMOS latches Packages A6800 14-pin 7.62 mm DIP (A package) A6800 14-pin SOICN (L package) A6801 28-pin PLCC (EP package) Approximate scale 1:1 A6801 24-pin SOICW (LW package).

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (A6800_AllegroMicroSystems.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number A6801
Manufacturer Allegro MicroSystems
File Size 261.13 KB
Description DABiC-5 Latched Sink Drivers
Datasheet download datasheet A6801 Datasheet

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Other Datasheets by Allegro MicroSystems

Part Number Description
A6800 (A6800 / A6801) DABiC-5 Latched Sink Drivers
A6809 DABiC-IV/ 10-BIT SERIAL-INPUT/ LATCHED SOURCE DRIVERS
A6810 10-Bit Serial Input Latched Source Driver
A6812 DABiC-IV/ 20-BIT SERIAL-INPUT/ LATCHED SOURCE DRIVER
A6821 DABiC-5 8-Bit Serial Input Latched Sink Drivers

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
A6800 and A6801 DABiC-5 Latched Sink Drivers Features and Benefits ▪ 3.3 to 5 V logic supply range ▪ Up to 10 MHz data input rate ▪ High-voltage, high-current outputs ▪ Darlington current-sink outputs, with improved low-saturation voltages ▪ CMOS, TTL compatible inputs ▪ Output transient protection ▪ Internal pull-down resistors ▪ Low-power CMOS latches Packages A6800 14-pin 7.62 mm DIP (A package) A6800 14-pin SOICN (L package) A6801 28-pin PLCC (EP package) Approximate scale 1:1 A6801 24-pin SOICW (LW package) Description The A6800 and A6801 latched-input BiMOS ICs merge high-current, high-voltage outputs with CMOS logic. The CMOS input section consists of 4 or 8 data (D type) latches with associated common CLEAR, STROBE, and OUTPUT ENABLE circuitry.