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A6800 - (A6800 / A6801) DABiC-5 Latched Sink Drivers

General Description

The A6800 and A6801 latched-input BiMOS ICs merge high-current, high-voltage outputs with CMOS logic.

The CMOS input section consists of 4 or 8 data (D type) latches with associated common CLEAR, STROBE, and OUTPUT ENABLE circuitry.

The power outputs are bipolar NPN Darlingtons.

Key Features

  • 3.3 to 5 V logic supply range.
  • Up to 10 MHz data input rate.
  • High-voltage, high-current outputs.
  • Darlington current-sink outputs, with improved low-saturation voltages.
  • CMOS, TTL compatible inputs.
  • Output transient protection.
  • Internal pull-down resistors.
  • Low-power CMOS latches Packages A6800 14-pin 7.62 mm DIP (A package) A6800 14-pin SOICN (L package) A6801 28-pin PLCC (EP package) Approximate scale 1:1 A6801 24-pin SOICW (LW package).

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Datasheet Details

Part number A6800
Manufacturer Allegro MicroSystems
File Size 261.13 KB
Description (A6800 / A6801) DABiC-5 Latched Sink Drivers
Datasheet download datasheet A6800 Datasheet

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Full PDF Text Transcription (Reference)

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A6800 and A6801 DABiC-5 Latched Sink Drivers Features and Benefits ▪ 3.3 to 5 V logic supply range ▪ Up to 10 MHz data input rate ▪ High-voltage, high-current outputs ▪ Darlington current-sink outputs, with improved low-saturation voltages ▪ CMOS, TTL compatible inputs ▪ Output transient protection ▪ Internal pull-down resistors ▪ Low-power CMOS latches Packages A6800 14-pin 7.62 mm DIP (A package) A6800 14-pin SOICN (L package) A6801 28-pin PLCC (EP package) Approximate scale 1:1 A6801 24-pin SOICW (LW package) Description The A6800 and A6801 latched-input BiMOS ICs merge high-current, high-voltage outputs with CMOS logic. The CMOS input section consists of 4 or 8 data (D type) latches with associated common CLEAR, STROBE, and OUTPUT ENABLE circuitry.