Description
The A6818 device combines a 32-bit CMOS shift register, accompanying data latches and control circuitry, with bipolar sourcing outputs and PNP active pull-downs.
40 mA output ratings also allow this device to be used in m
Features
- Controlled output slew rate.
- 60 V minimum output break down.
- PNP active pull-downs.
- Low-power CMOS logic and latches.
- High-speed data storage.
- High data-input rate.
- Low output-saturation voltages.
- Improved replacements for SN75518N, SN75518NF,
UCN5818x, and UCQ5818x
Package: 44 pin PLCC (suffix EP).