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Alliance Semiconductor Corporation

AS7C33256NTF18B Datasheet Preview

AS7C33256NTF18B Datasheet

3.3V 256K x 18 Flowthrough Synchronous SRAM

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April 2005
AS7C33256NTF18B
®
3.3V 256K x 18 Flowthrough Synchronous SRAM with NTDTM
Features
• Organization: 262,144 words × 18 bits
• NTDarchitecture for efficient bus operation
• Fast clock to data access: 7.5/8.0/10.0 ns
• Fast OE access time: 3.5/4.0 ns
• Fully synchronous operation
• Flow-through mode
• Asynchronous output enable control
• Available in 100-pin TQFP package
www.DataSheet4U.com
• Byte write enables
• Clock enable for operation hold
• Multiple chip enables for easy expansion
• 3.3V core power supply
• 2.5V or 3.3V I/O operation with separate VDDQ
• Self-timed write cycles
• Interleaved or linear burst modes
• Snooze mode for standby operation
Logic block diagram
A[17:0]
18
CE0
CE1
CE2
R/W
BWa
BWb
ADV / LD
LBO
ZZ
DQ
Aredgdirsetesrs
burst logic
CLK
Control
logic
CLK
DQ [a,b]
18
D
Data
input
Q
register
CLK
CLK
CEN
18
DQ
Write delay
addr. registers
CLK
18
CLK
256K x 18
SRAM
array
18
18 18
18
Output
buffer
OE
18
OE
DQ [a,b]
Selection guide
Minimum cycle time
Maximum clock access time
Maximum operating current
Maximum standby current
Maximum CMOS standby current (DC)
-75 -80 -10 Units
8.5 10 12 ns
7.5 8.0 10 ns
260 230 200 mA
110 100
90 mA
30 30 30 mA
4/13/05, v 1.3
Alliance Semiconductor
P. 1 of 18
Copyright © Alliance Semiconductor. All rights reserved.




Alliance Semiconductor Corporation

AS7C33256NTF18B Datasheet Preview

AS7C33256NTF18B Datasheet

3.3V 256K x 18 Flowthrough Synchronous SRAM

No Preview Available !

4 Mb Synchronous SRAM products list1,2
Org Part Number
256KX18
AS7C33256PFS18B
128KX32
AS7C33128PFS32B
128KX36
AS7C33128PFS36B
256KX18
AS7C33256PFD18B
128KX32
AS7C33128PFD32B
128KX36
AS7C33128PFD36B
256KX18
AS7C33256FT18B
www.DataSheet4U.co1m28KX32
128KX36
AS7C33128FT32B
AS7C33128FT36B
256KX18
AS7C33256NTD18B
128KX32
AS7C33128NTD32B
128KX36
AS7C33128NTD36B
256KX18
AS7C33256NTF18B
128KX32
AS7C33128NTF32B
128KX36
AS7C33128NTF36B
1 Core Power Supply: VDD = 3.3V + 0.165V
2 I/O Supply Voltage: VDDQ = 3.3V + 0.165V for 3.3V I/O
VDDQ = 2.5V + 0.125V for 2.5V I/O
®
Mode
PL-SCD
PL-SCD
PL-SCD
PL-DCD
PL-DCD
PL-DCD
FT
FT
FT
NTD-PL
NTD-PL
NTD-PL
NTD-FT
NTD-FT
NTD-FT
PL-SCD : Pipelined Burst Synchronous SRAM - Single Cycle Deselect
PL-DCD : Pipelined Burst Synchronous SRAM - Double Cycle Deselect
FT : Flow-through Burst Synchronous SRAM
NTD1-PL : Pipelined Burst Synchronous SRAM with NTDTM
NTD-FT : Flow-through Burst Synchronous SRAM with NTDTM
AS7C33256NTF18B
Speed
200/166/133 MHz
200/166/133 MHz
200/166/133 MHz
200/166/133 MHz
200/166/133 MHz
200/166/133 MHz
7.5/8.0/10 ns
7.5/8.0/10 ns
7.5/8.0/10 ns
200/166/133 MHz
200/166/133 MHz
200/166/133 MHz
7.5/8.0/10 ns
7.5/8.0/10 ns
7.5/8.0/10 ns
1. NTD: No Turnaround Delay. NTDTM is a trademark of Alliance Semiconductor Corporation. All trademarks mentioned in this document are the property
of their respective owners.
4/13/05, v 1.3
Alliance Semiconductor
P. 2 of 18


Part Number AS7C33256NTF18B
Description 3.3V 256K x 18 Flowthrough Synchronous SRAM
Maker Alliance Semiconductor Corporation
Total Page 18 Pages
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Alliance Semiconductor Corporation





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