AS7C3364PFD32B sram equivalent, (as7c3364pfd32b / as7c3364pfd36b) 3.3v 64k x 32/36 pipeline burst synchronous sram.
* Organization: 65,536 words × 32 or 36 bits
* Fast clock speeds to 200 MHz
* Fast clock to data access: 3.0/3.5/4.0 ns
* Fast OE access time: 3.0/3.5/4.0.
Write cycles are performed by disabling the output buffers with OE and asserting a write command. A global write enable.
The AS7C3364PFD32B and AS7C3364PFD36B are high-performance CMOS 2-Mbit synchronous Static Random Access Memory (SRAM) devices organized as 65,536 words × 32 or 36 bits, and incorporate a two-stage register-register pipeline for highest frequency on a.
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