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AS7C3364PFS32A - (AS7C3364PFS32A / AS7C3364PFS36A) 3.3V 64K X 32/36 pipeline burst synchronous SRAM

Description

The AS7C3364PFS32A and AS7C3364PFS36A are high-performance CMOS 2-Mbit synchronous Static Random Access Memory (SRAM) devices organized as 65,536 words × 32 or 36 bits, and incorporate a two-stage register-register pipeline for highest frequency on any given technology.

Features

  • Organization: 65,536 words × 32 or 36 bits.
  • Fast clock speeds to 166 MHz in LVTTL/LVCMOS.
  • Fast clock to data access: 3.5/3.8/4.0/5.0 ns.
  • Fast OE access time: 3.5/3.8/4.0/5.0 ns.
  • Fully synchronous register-to-register operation.
  • Single register “Flow-through” mode.
  • Single-cycle deselect.
  • Pentium®.
  • compatible architecture and timing www. DataSheet4U. com.
  • Asynchronous output enable control.
  • Economical 100.

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Datasheet Details

Part number AS7C3364PFS32A
Manufacturer Alliance Semiconductor Corporation
File Size 265.80 KB
Description (AS7C3364PFS32A / AS7C3364PFS36A) 3.3V 64K X 32/36 pipeline burst synchronous SRAM
Datasheet download datasheet AS7C3364PFS32A Datasheet

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Full PDF Text Transcription

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January 2001 Preliminary Information ® AS7C3364PFS32A AS7C3364PFS36A 3.3V 64K X 32/36 pipeline burst synchronous SRAM Features • Organization: 65,536 words × 32 or 36 bits • Fast clock speeds to 166 MHz in LVTTL/LVCMOS • Fast clock to data access: 3.5/3.8/4.0/5.0 ns • Fast OE access time: 3.5/3.8/4.0/5.0 ns • Fully synchronous register-to-register operation • Single register “Flow-through” mode • Single-cycle deselect • Pentium®* compatible architecture and timing www.DataSheet4U.com • Asynchronous output enable control • Economical 100-pin TQFP package • Byte write enables • Multiple chip enables for easy expansion • 3.3 core power supply • 2.5V or 3.
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