AS9C25128M2036L Description
September 2004 Preliminary Information ® AS9C25256M2036L AS9C25128M2036L .. 2.5V 256/128K X 36 Synchronous Dual-port SRAM with 3.3V or 2.5V interface.
AS9C25128M2036L Key Features
- True Dual-Port memory cells that allow simultaneous access of the same memory location
- Organisation: 262,144/131,072 x 36[1]
- Fully Synchronous, independent operation on both ports
- Selectable Pipeline or Flow-Through output mode
- Fast clock speeds in Pipeline output mode: 250 MHz operation (18Gbps bandwidth)
- Fast clock to data access: 2.8ns for Pipeline output mode
- Asynchronous output enable control
- Fast OE access times: 2.8ns
- Double Cycle Deselect (DCD) for Pipeline Output Mode
- 18/17[1]-bit counter with Increment, Hold and Repeat features on each port