ASM4SSTVF16859 Overview
The ASM4SSTVF16859 is a universal 13/26 bit register (D F/F based), designed for 2.3V to 2.7V In the JEDEC defined Registered DDR DIMM application, RESETB is specified to be asynchronous with respect to CLK/CLKB; therefore, no timing relationship can be guaranteed between the two signals. When entering a low-power standby state, the register will be cleared and the outputs will be driven to a logic low level quickly...
ASM4SSTVF16859 Key Features
- Differential clock signals. Meets SSTL_2 class II specifications on outputs
- Product Description
- 200 MHz ). 13/26 bits refers to 2Q outputs for each D input
- designed for use in Stacked Registered (stacked Memory Devices), Buffered DIMM