ASM4SSTVF32852 Datasheet - Alliance Semiconductor Corporation

ASM4SSTVF32852 DDR 24-Bit to 48-Bit Registered Buffer

The 24-Bit to 48-Bit ASM4SSTVF32852 is a universal bus driver designed for 2.3V to 2.7V VDD operation and SSTL_2 I/O levels except for the LVCMOS RESETB input. Data flow from D to Q is controlled by the differential clock (CLK/CLKB) and a control signal (RESETB). The positive edge of CLK is used to .

ASM4SSTVF32852 Features

* Differential clock signals. Supports SSTL_2 class II specifications on inputs and outputs. Low voltage operation.

* VDD = 2.3V to 2.7V. To ensure that outputs are at a defined logic state before a stable clock has been supplied, RESETB must be held at a logic “Low” level during powe

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Datasheet Details

Part number:

ASM4SSTVF32852

Manufacturer:

Alliance Semiconductor Corporation

File Size:

149.39 KB

Description:

Ddr 24-bit to 48-bit registered buffer.

ASM4SSTVF32852 Distributor

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ASM4SSTVF32852 ASM4SSTVF32852 DDR 24-Bit 48-Bit Registered Buffer Alliance Semiconductor Corporation