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EPM3512A Datasheet Programmable Logic

Manufacturer: Altera

Overview: June 2006, ver. 3.5 ® MAX 3000A Programmable Logic Device Family Data.

This datasheet includes multiple variants, all published together in a single manufacturer document.

General Description

■ PCI compatible ■ Bus–friendly architecture including programmable slew–rate control ■ Open–drain output option ■ Programmable macrocell flipflops with individual clear, preset, clock, and clock enable cont

Key Features

  • High.
  • performance, low.
  • cost CMOS EEPROM.
  • based programmable logic devices (PLDs) built on a MAX® architecture (see Table 1).
  • 3.3-V in-system programmability (ISP) through the built.
  • in IEEE Std. 1149.1 Joint Test Action Group (JTAG) interface with advanced pin-locking capability.
  • ISP circuitry compliant with IEEE Std. 1532.
  • Built.
  • in boundary-scan test (BST) circuitry compliant with IEEE Std. 1149.1-1990.
  • Enhanced ISP features:.

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EPM3512A Distributor