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AD1959 - PLL/Multibit DAC

Description

28-Lead Small Outline Package 28-Lead Small Outline Package Evaluation Board Package Option RS-28 RS-28 on 13" Reels PIN CONFIGURATION CCLK 1 CLATCH 2 RESET 3 LRCLK 4 BCLK 5 SDATA 6 DVDD 7 28 27 26 25 24 CDATA MUTE ZERO FILTB AVDD OUTL AD1959 23 22 AGND1 TOP VIEW DGND 8 (Not to Scale) 21 FLT

Features

  • 5 V Stereo Audio DAC System Accepts 16-Bit/20-Bit/24-Bit Data Supports 24 Bits, 192 kHz Sample Rate Accepts a Wide Range of Sample Rates Including: 32 kHz, 44.1 kHz, 48 kHz, 88.2 kHz, 96 kHz, and 192 kHz Multibit Sigma-Delta Modulator with Data Directed Scrambling Single-Ended Output for Easy.

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a FEATURES 5 V Stereo Audio DAC System Accepts 16-Bit/20-Bit/24-Bit Data Supports 24 Bits, 192 kHz Sample Rate Accepts a Wide Range of Sample Rates Including: 32 kHz, 44.1 kHz, 48 kHz, 88.2 kHz, 96 kHz, and 192 kHz Multibit Sigma-Delta Modulator with Data Directed Scrambling Single-Ended Output for Easy Application –94 dB THD + N 108 dB SNR and Dynamic Range 75 dB Stopband Attenuation Clickless Volume Control Hardware and Software Controllable Clickless Mute Serial (SPI) Control for: Serial Mode, Number of Bits, Sample Rate, Volume, Mute, De-Emphasis and Output Phase Digital De-Emphasis Processing for 32 kHz, 44.1 kHz, and 48 kHz Sample Rates Programmable Dual Fractional-N PLL Clock Generator 27 MHz Master Clock Input/Oscillator Generated System Clocks SCLK0: 33.
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