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AD6121 - CDMA 3 V Receiver IF Subsystem with Integrated Voltage Regulator

Datasheet Summary

Description

The AD6121 is a low power receiver IF subsystem specifically designed for CDMA applications.

It consists of high dynamic range IF amplifiers with voltage controlled gain, a divide-by-two quadrature generator, an I and Q demodulator, and a powerdown control input.

Features

  • Fully Compliant with IS98A and PCS Specifications CDMA, W-CDMA, AMPS, and TACS Operation Linear IF Amplifier 5.9 dB Noise Figure.
  • 47.5 dB to +47 dB Linear-in-dB Gain Control Quadrature Demodulator Demodulates IFs from 50 MHz to 350 MHz Integral Low Dropout Regulator 200 mV Voltage Drop Accepts 2.9 V to 4.2 V Input from Battery Low Power 10 mA at Midgain.

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Datasheet Details

Part number AD6121
Manufacturer Analog Devices
File Size 258.15 KB
Description CDMA 3 V Receiver IF Subsystem with Integrated Voltage Regulator
Datasheet download datasheet AD6121 Datasheet
Additional preview pages of the AD6121 datasheet.

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Full PDF Text Transcription

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a FEATURES Fully Compliant with IS98A and PCS Specifications CDMA, W-CDMA, AMPS, and TACS Operation Linear IF Amplifier 5.9 dB Noise Figure –47.5 dB to +47 dB Linear-in-dB Gain Control Quadrature Demodulator Demodulates IFs from 50 MHz to 350 MHz Integral Low Dropout Regulator 200 mV Voltage Drop Accepts 2.9 V to 4.2 V Input from Battery Low Power 10 mA at Midgain <1 ␮ A Sleep Mode Operation Companion Transmitter IF Chip Available (AD6122) APPLICATIONS CDMA, W-CDMA, AMPS, and TACS Operation QPSK Receivers CDMA 3 V Receiver IF Subsystem with Integrated Voltage Regulator AD6121 GENERAL DESCRIPTION The AD6121 is a low power receiver IF subsystem specifically designed for CDMA applications.
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