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Analog Devices Semiconductor Electronic Components Datasheet

AD6458 Datasheet

GSM 3 V Receiver IF Subsystem

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AD6458 pdf
a
FEATURES
Fully Compliant with Standard and Enhanced GSM
Specification
–12 dBm Input 1 dB Compression Point
–2 dBm Input Third Order Intercept
10 dB SSB Noise Figure (330 )
DC–400 MHz RF and LO Bandwidths
Linear IF Amplifier
Linear-in-dB and Stable over Temperature Voltage
Gain Control
Quadrature Demodulator
Onboard Phase-Locked Quadrature Oscillator
Demodulates IFs from 5 MHz to 50 MHz
Low Power
9 mA at Midgain
1 A Sleep Mode Operation
3.0 V to 3.6 V Operation
Interfaces to AD7013, AD7015 and AD6421 Baseband
Converters
20-Lead SSOP
GSM 3 V Receiver IF Subsystem
AD6458
FUNCTIONAL BLOCK DIAGRAM
LO
RF
AGC
FREF
BPF
PLO
I
Q
AD6458
GENERAL DESCRIPTION
The AD6458 is a 3 V, low power receiver IF subsystem for
operation at input frequencies as high as 400 MHz and IFs from
5 MHz up to 50 MHz. It is optimized for operation in GSM,
DCS1800 and PCS1900 receivers. It consists of a mixer, IF
amplifier, I and Q demodulators, a phase-locked quadrature
oscillator, precise AGC subsystem, and a biasing system with
external power-down.
The low noise, high intercept mixer of the AD6458 is a
doubly-balanced Gilbert cell type. It has a nominal –12 dBm
input-referred 1 dB compression point and a –2 dBm input-
referred third-order intercept. The mixer section of the AD6458
also includes a local oscillator (LO) preamplifier, which lowers
the required LO drive to –16 dBm.
The gain control input accepts an external gain-control voltage
input from an external AGC detector or a DAC. It provides an
80 dB gain range with 27 mV/dB gain scaling.
The I and Q demodulators provide inphase and quadrature
baseband outputs to interface with Analog Devices’ AD7013
(IS54, TETRA, MSAT) and AD7015 and AD6421 (GSM,
DCS1800, PCS1900) baseband converters. An onboard
quadrature VCO which is externally phase-locked to the IF
signal drives the I and Q demodulators. This locked reference
signal is normally provided by an external VCTCXO under the
control of the radio’s digital processor. The AD6458 can also
provide demodulation of N-PSK and N-QAM in many non-
TDMA systems when used with external analog carrier recovery
systems such as the Costas Loop. Finally, the VCO can be
phase-locked to a frequency which is deliberately offset from the
IF, as in the case of a Beat-Frequency Oscillator (BFO), result-
ing in the product detection of CW or SSB.
The AD6458 uses supply voltages from 3.0 V to 3.6 V over the
temperature range of –40°C to +85°C. Operation is enabled by
a CMOS logical level; response time is typically <80 µs. When
disabled, the standby current is reduced to 1 µA.
The AD6458 comes in a 20-lead shrink small outline (SSOP)
surface-mount package.
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700 World Wide Web Site: http://www.analog.com
Fax: 617/326-8703
© Analog Devices, Inc., 1997


Analog Devices Semiconductor Electronic Components Datasheet

AD6458 Datasheet

GSM 3 V Receiver IF Subsystem

No Preview Available !

AD6458 pdf
AD6458–SPECIFICATIONS (@ TA = +25؇C, VP = 3.0 V, GREF = 1.2 V, unless otherwise noted)
Parameter
Conditions
Min Typ
Max
Units
MIXER
Maximum RF and LO Frequency
AGC Conversion Gain Variation
Input RF Signal Range
Input 1 dB Compression Point
Input Third-Order Intercept
SSB Noise Figure1
Mixer Output Bandwidth at MXOP
IF AMPLIFIERS
AGC Gain Variation
Input Referred Noise
Input Resistance
Bandwidth
400
0.2 V < VG < 2.25 V, ZS = 50 , ZLOAD = 330
–8.5 to +9.5
–95 –15
@ VG = 0.2 V, ZS = 50 , ZLOAD = 330
@ VG = 0.2 V, ZS = 50 , ZLOAD = 330
@ ZS =1 k, FRF = 83 MHz, FLO = 96 MHz at –16 dBm
@ –3 dB, ZLOAD = 330
–11
–2
9
55
0.2 V < VG < 2.25 V
AC Short Circuit Input
@ VG = 0.2 V
@ –3 dB
–9 to +48
3
5
50
MHz
dB
dBm
dBm
dBm
dB
MHz
dB
nV/Hz
k
MHz
I AND Q DEMODULATORS
Demodulation Gain
Output Voltage Range
Output Voltage Common-Mode Level
Output Offset Voltage
Output Offset Voltage Variation
Output Offset Voltage Variation
Error in Quadrature
Amplitude Match
I/Q Output Bandwidth
Output Resistance
IRXP, IRXN, QRXP, QRXN
(Not Power Supply Dependant)
Differential
Differential, over Gain and Temperature Range2
Differential, for 0.5 V < VG < 2.4 V and
–25°C < TA < +85°C (See Note 2)
IF = 13 MHz
CLOAD = 10 pF
Each Pin
17
0.3
1.5
–150
1
0.5
1.5
0.25
2
4.7
VP – 0.2
+150
dB
V
V
mV
mV
mV
3.7 Degree
dB
MHz
k
GAIN CONTROL
Total Gain Control Range
Control Voltage Range at GAIN
Gain Scaling
Gain Law Conformance
Bias Current at GREF
Input Resistance at GAIN
Mixer + IF + Demod, 0.2 V < VG < 2.25 V
75 dB
0.2 2.4 V
23 27
32 mV/dB
± 0.5
dB
0.5 µA
20 k
PLL
Frequency Range
Phase Noise
Acquisition Time
Input Drive Level (FREF)
IF = 13 MHz, Using Ceramic Filter
5
0.5
80
100
40
VPOS
MHz
Degree rms
µs
mV
POWER-DOWN INTERFACE
Logical Threshold
Input Current for Logical High
Turn On Response Time
Stand By Current
Power-Up On Logical High
To Fully Meet Specifications
(See Note 3)
1.5 V
75 µA
80 150 µs
1 8 µA
POWER SUPPLY
Supply Range
Worst Case Supply Current
Supply Current
@ VGAIN = 0.2 V, TA = +85°C, VP = 3.6 V4
@ VGAIN = 1.2 V
3.0 3.3
3.6 V
16.5 22 mA
9 mA
OPERATING TEMPERATURE
TMIN to TMAX
–40 to +85
°C
NOTES
1Including IF noise and using 13 MHz ceramic filter, at VGAIN = 0.2 V.
2Histograms of Demodulator Offset Voltage Variation in Gain and Temperature can be found in Figures 23 to 27.
3Max value represent the value at six times the standard deviation, in the worst case condition (T A = +85°C). The value at three times the standard deviation is 5 µA.
4Max value represent the value at six times the standard deviation. The value at three times the standard variation is 19 mA.
Specifications subject to change without notice.
–2– REV. 0


Part Number AD6458
Description GSM 3 V Receiver IF Subsystem
Maker Analog Devices
Total Page 12 Pages
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