AD6905 Key Features
- L1 program space: 64 kB SRAM and 16 kB configurable as instruction cache or SRAM
- L1 data space: Two banks of 16K bytes, each with 8K bytes of dedicated SRAM and an additional 8K bytes that can be confi
- L2 space: 64KB SRAM Ciphering coprocessor supporting A5/1, A5/2, A5/3, GEA1