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FEATURES
Port level 2:1 mux/1:2 demux Each port consists of 4 lanes Each lane runs from dc to 3.2 Gbps, independent of the other
lanes Compensates over 40 inches of FR4 at 3.2 Gbps through
2 levels of input equalization or 4 levels of output pre-emphasis Accepts ac- or dc-coupled differential CML inputs Low deterministic jitter, typically 20 ps p-p Low random jitter, typically 1 ps rms BER < 10−16 On-chip termination Reversible inputs and outputs on one port Unicast or bicast on 1:2 demux function Port level loopback capability Single lane switching capability 3.3 V core supply Flexible I/O supply down to 2.
AD8159 Datasheet
