AD9751 Datasheet | Analog Devices

a Features 10-Bit Dual Muxed Port DAC 300 MSPS Output Update Rate Excellent SFDR and IMD Performance SFDR to Nyquist @ 25 MHz Output: 64 dB Internal Clock Doubling PLL Differential or Single-Ended Clock Input On-Chip 1.2 V Reference Single 3.3 V Supply Operation Power Dissipation: 155 mW @ 3.3 V 48-Lead LQFP APPLICATIONS munications: LMDS, LMCS, MMDS Base Stations Digital Synthesis QAM and OFDM 10-Bit, 300 MSPS High Speed TxDAC+® D/A Converter AD9751- FUNCTIONAL BLOCK DIAGRAM DVDD D AVDD A DAC LATCH PORT1 LATCH PORT2 LATCH IOUTA IOUTB CLK+ CLK- CLKVDD PLLVDD CLK PLL CLOCK MULTIPLIER REFERENCE RESET LPF DIV0 DIV1 PLLLOCK REFIO FSADJ PRODUCT...