AD9973 Datasheet | Analog Devices

FEATURES 1.8 V analog and digital core supply voltage Serial data link with reduced range LVDS outputs Correlated double sampler (CDS) with - 3 d B, 0 d B, +3 d B, +6 d B gain 6 d B to 42 d B, 10-bit variable gain amplifier (VGA) 14-bit, 65 MHz analog-to-digital converter Black level clamp with variable level control plete on-chip timing generator Precision Timing core with 240 ps resolution @ 65 MHz .. On-chip 3 V horizontal and RG drivers 6 mm × 6 mm, 84-ball CSP_BGA package GENERAL DESCRIPTION The AD9973 is a highly integrated dual channel CCD signal processor for high speed digital video camera applications. Each channel is specified at pixel rates of up to 65 MHz, and consists of a plete analog front end with analog-to-digital conversion, bined with a programmable timing driver. The Precision Timing core allows adjustment of high speed clocks with 240 ps resolution at 65 MHz operation. The AD9973 also contains a reduced range LVDS interface for the dual-channel data outputs. Each analog front end (AFE) includes black level clamping, CDS, VGA, and a 65 MSPS, 14-bit analog-to-digital converter. The timing driver provides the high speed CCD clock drivers for RG, HL, and H1 to H4. Operation is programmed using a 3-wire serial interface. Packaged in a space-saving 6 mm × 6 mm, 84-ball CSP_BGA, the AD9973 is specified over an operating temperature range of - 25°C to +85°C. APPLICATIONS Professional HDTV camcorders Professional, high-end digital cameras Broadcast cameras Industrial high speed cameras FUNCTIONAL BLOCK DIAGRAM REFT_A REFB_A REFT_B REFB_B CCDINP_A CDS CCDINM_A VREF_A VREF_B DOUT0P_A DOUT0N_A DOUT1P_A DOUT1N_A TCLKP_A TCLKN_A DOUT0P_B DOUT0N_B DOUT1P_B DOUT1N_B TCLKP_B TCLKN_B - 3d B, 0d B, +3d B, +6d B 6d B ~ 42d B ADC REDUCED RANGE LVDS INTERFACE CLAMP CLAMP CCDINP_B CDS CCDINM_B 1.8V OUTPUT - 3d B, 0d B, +3d B, +6d B VGA 6d B ~ 42d B ADC LDO_OUT_A LDO A INTERNAL CLOCKS LDO_OUT_B 1.8V OUTPUT LDO B RG_A RG_B HLA, H1A TO H4A 5 HORIZONTAL...