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ADF4196 - 6 GHz PLL Frequency Synthesizer

General Description

The ADF4196 frequency synthesizer can be used to implement local oscillators (LO) in the upconversion and downconversion sections of wireless receivers and transmitters.

Key Features

  • Fast settling, fractional-N PLL architecture Single PLL replaces ping-pong synthesizers Frequency hop across GSM band in 5 μs with phase settled within 20 μs 1 degree rms phase error at 4 GHz RF output Digitally programmable output phase RF input range up to 6 GHz 3-wire serial interface On-chip, low noise differential amplifier Phase noise figure of merit:.
  • 216 dBc/Hz.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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Data Sheet Low Phase Noise, Fast Settling, 6 GHz PLL Frequency Synthesizer ADF4196 FEATURES Fast settling, fractional-N PLL architecture Single PLL replaces ping-pong synthesizers Frequency hop across GSM band in 5 μs with phase settled within 20 μs 1 degree rms phase error at 4 GHz RF output Digitally programmable output phase RF input range up to 6 GHz 3-wire serial interface On-chip, low noise differential amplifier Phase noise figure of merit: −216 dBc/Hz APPLICATIONS GSM/EDGE base stations PHS base stations Pulse Doppler radar Instrumentation and test equipment Beam-forming/phased array systems GENERAL DESCRIPTION The ADF4196 frequency synthesizer can be used to implement local oscillators (LO) in the upconversion and downconversion sections of wireless receivers and transmitters.