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Analog Devices Semiconductor Electronic Components Datasheet

ADGS1209 Datasheet

8:1/Dual 4:1 Mux Switches

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Data Sheet
SPI Interface, Low CON and QINJ, ±15 V/+12 V,
1.8 V Logic Control, 8:1/Dual 4:1 Mux Switches
ADGS1208/ADGS1209
FEATURES
SPI interface with error detection
Includes CRC, invalid read/write address, and SCLK count
error detection
Supports burst mode and daisy-chain mode
Industry standard SPI Mode 0 and SPI Mode 3 interface
compatible
Round robin mode allows switching times that are
comparable with a parallel interface
Four general-purpose digital outputs that can be used to
control other devices
<1 pC charge injection over full signal range
1 pF off capacitance
VSS to VDD analog signal range
Fully specified at ±15 V and +12 V
1.8 V logic compatibility with 2.7 V ≤ VL ≤ 3.3 V
24-lead LFCSP package
APPLICATIONS
Audio and video routing
Automatic test equipment
Data acquisition systems
Battery-powered systems
Sample-and-hold systems
Communication systems
GENERAL DESCRIPTION
The ADGS1208/ADGS1209 are analog multiplexers comprising
eight single channels and four differential channels, respectively. A
serial peripheral interface (SPI) controls the switches. The SPI
interface has robust error detection features, such as cyclic
redundancy check (CRC) error detection, invalid read/write
address detection, and SCLK count error detection.
It is possible to daisy-chain multiple ADGS1208/ADGS1209
devices together. Daisy-chain mode enables the configuration of
multiple devices with a minimal amount of digital lines. The
ADGS1208/ADGS1209 can also operate in burst mode to
decrease the time between SPI commands.
iCMOS® construction ensures ultralow power dissipation,
making the devices ideally suited for portable and battery-
powered instruments.
Each switch conducts equally well in both directions when on,
and each switch has an input signal range that extends to the
supplies. In the off condition, signal levels up to the supplies
are blocked.
FUNCTIONAL BLOCK DIAGRAMS
ADGS1208
S1
D
S8
GPO1
GPO2
GPO3
GPO4
SPI
INTERFACE
CNV
SDO
SCLK SDI CS RESET/VL
Figure 1. ADGS1208 Functional Block Diagram
ADGS1209
S1A
DA
S4A
S1B
S4B
GPO1
GPO2
GPO3
GPO4
SPI
INTERFACE
DB
CNV
SDO
SCLK SDI CS RESET/VL
Figure 2. ADGS1209 Functional Block Diagram
The ultralow on capacitance (CON) and exceptionally low charge
injection (QINJ) of these multiplexers make them ideal solutions
for data acquisition and sample-and-hold applications, where
low glitch and fast settling are required.
PRODUCT HIGHLIGHTS
1. SPI interface removes the need for parallel conversion,
logic traces, and reduces GPIO channel count.
2. Daisy-chain mode removes additional logic traces when
multiple devices are used.
3. CRC error detection, invalid read/write address detection,
and SCLK count error detection ensure a robust digital
interface.
4. CRC and error detection capabilities allow the use of the
ADGS1208/ADGS1209 in safety critical systems.
Rev. 0
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
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One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
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Technical Support
www.analog.com


Analog Devices Semiconductor Electronic Components Datasheet

ADGS1209 Datasheet

8:1/Dual 4:1 Mux Switches

No Preview Available !

ADGS1208/ADGS1209
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagrams............................................................. 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
±15 V Dual Supply ....................................................................... 3
12 V Single Supply........................................................................ 5
Continuous Current per Channel, Sx or Dx............................. 8
Timing Characteristics ................................................................ 9
Absolute Maximum Ratings.......................................................... 11
Thermal Resistance .................................................................... 11
ESD Caution................................................................................ 11
Pin Configurations and Function Descriptions ......................... 12
Typical Performance Characteristics ........................................... 14
Test Circuits..................................................................................... 18
Terminology .................................................................................... 21
Theory of Operation ...................................................................... 22
Address Mode ............................................................................. 22
Error Detection Features ........................................................... 22
Clearing the Error Flags Register ............................................. 23
Burst Mode .................................................................................. 23
REVISION HISTORY
4/2018—Revision 0: Initial Version
Data Sheet
Software Reset............................................................................. 23
Daisy-Chain Mode ..................................................................... 23
Power-On Reset.......................................................................... 24
Round Robin Mode.................................................................... 25
General-Purpose Outputs ......................................................... 26
Applications Information .............................................................. 27
Digital Input Buffers .................................................................. 27
Settling Time............................................................................... 27
Power Supply Rails ..................................................................... 27
Power Supply Recommendations............................................. 27
Register Summaries........................................................................ 28
Register Details ............................................................................... 29
Switch Data Register .................................................................. 29
Error Configuration Register.................................................... 30
Error Flags Register.................................................................... 30
Burst Enable Register................................................................. 31
Round Robin Enable Register................................................... 31
Round Robin Channel Configuration Register...................... 31
CNV Edge Select Register......................................................... 32
Software Reset Register ............................................................. 32
Outline Dimensions ....................................................................... 33
Ordering Guide .......................................................................... 33
Rev. 0 | Page 2 of 33


Part Number ADGS1209
Description 8:1/Dual 4:1 Mux Switches
Maker Analog Devices
Total Page 30 Pages
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