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ADGS1412 - Quad SPST Switch

Description

The ADGS1412 contains four independent single-pole/singlethrow (SPST) switches.

A serial peripheral interface (SPI) controls the switches.

Features

  • SPI interface with error detection Includes CRC, invalid read/write address, and SCLK count error detection Supports burst mode and daisy-chain mode Industry-standard SPI Mode 0 and Mode 3 interface compatible Guaranteed break-before-make switching allowing external wiring of switches to deliver multiplexer configurations 1.5 Ω typical on resistance at 25°C 0.3 Ω typical on resistance flatness at 25°C 0.1 Ω typical on resistance match between channels at 25°C VSS to VDD analog signal range Fully.

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Full PDF Text Transcription

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Data Sheet SPI Interface, 1.5 Ω RON, ±15 V/+12 V, Quad SPST Switch, Mux Configurable ADGS1412 FEATURES SPI interface with error detection Includes CRC, invalid read/write address, and SCLK count error detection Supports burst mode and daisy-chain mode Industry-standard SPI Mode 0 and Mode 3 interface compatible Guaranteed break-before-make switching allowing external wiring of switches to deliver multiplexer configurations 1.5 Ω typical on resistance at 25°C 0.3 Ω typical on resistance flatness at 25°C 0.1 Ω typical on resistance match between channels at 25°C VSS to VDD analog signal range Fully specified at ±15 V, ±5 V, and +12 V 1.8 V logic compatibility with 2.7 V ≤ VL ≤ 3.
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