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Data Sheet
SPI Interface, Low CON and QINJ, ±15 V/+12 V, 1.8 V Logic Control, 8:1/Dual 4:1 Mux Switches
ADGS1208/ADGS1209
FEATURES
SPI interface with error detection Includes CRC, invalid read/write address, and SCLK count
error detection Supports burst mode and daisy-chain mode Industry standard SPI Mode 0 and SPI Mode 3 interface
compatible Round robin mode allows switching times that are
comparable with a parallel interface Four general-purpose digital outputs that can be used to
control other devices <1 pC charge injection over full signal range 1 pF off capacitance VSS to VDD analog signal range
Fully specified at ±15 V and +12 V 1.8 V logic compatibility with 2.7 V ≤ VL ≤ 3.