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ADGS5412 - High Voltage Latch-Up Proof Quad SPST Switch

General Description

The ADGS5412 contains four independent single-pole/singlethrow (SPST) switches.

An SPI interface controls the switches.

Key Features

  • SPI interface with Error Detection Includes CRC, Invalid Read/Write Address and SCLK Count Error detection Supports burst and daisy-chain mode Industry standard SPI modes 0 and 3 interface compatible Latch-up proof Low on resistance (.

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Full PDF Text Transcription for ADGS5412 (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for ADGS5412. For precise diagrams, and layout, please refer to the original PDF.

Serially-Controlled, High Voltage Latch-Up Proof Quad SPST Switch Preliminary Technical Data ADGS5412 FEATURES SPI interface with Error Detection Includes CRC, Invalid Re...

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2 FEATURES SPI interface with Error Detection Includes CRC, Invalid Read/Write Address and SCLK Count Error detection Supports burst and daisy-chain mode Industry standard SPI modes 0 and 3 interface compatible Latch-up proof Low on resistance (<10 Ω) ±9 V to ±22 V dual-supply operation 9 V to 40 V single-supply operation Fully specified at ±15 V, ±20 V, +12 V, and +36 V VSS to VDD analog signal range APPLICATIONS Relay replacement Automatic test equipment Data acquisition Instrumentation Avionics Audio and video switching Communication systems GENERAL DESCRIPTION The ADGS5412 contains four independent single-pole/singleth

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