Avalanche Photodiode Bias Controller and
Wide Range (5 nA to 5 mA) Current Monitor
Accurately sets avalanche photodiode (APD) bias voltage
Wide bias range from 6 V to 75 V
3 V-compatible control interface
Monitors photodiode current (5:1 ratio) over six decades
Linearity 0.25% from 10 nA to 1 mA, 0.5% from 5 nA to 5 mA
Overcurrent protection and overtemperature shutdown
Miniature 16-lead chip scale package (LFCSP 3 mm × 3 mm)
Optical power monitoring and biasing in APD systems
Wide dynamic range voltage sourcing and current
monitoring in high voltage systems
The ADL5317 is a high voltage, wide dynamic range, biasing
and current monitoring device optimized for use with
avalanche photodiodes. When used with a stable high voltage
supply (up to 80 V), the bias voltage at the VAPD pin can be
varied from 6 V to 75 V using the 3 V-compatible VSET pin.
The current sourced from the VAPD pin over a range of 5 nA to
5 mA is accurately mirrored with an attenuation of 5 and
sourced from the IPDM monitor output. In a typical
application, the monitor output drives a current input
logarithmic amplifier to produce an output representing the
optical power incident upon the photodiode. The photodiode
anode can be connected to a high speed transimpedance
amplifier for the extraction of the data stream.
A signal of 0.2 V to 2.5 V with respect to ground applied at the
VSET pin is amplified by a fixed gain of 30 to produce the 6 V
to 75 V bias at Pin VAPD. The accuracy of the bias control
interface of the ADL5317 allows for straightforward calibration,
thereby maintaining a constant avalanche multiplication factor
of the photodiode over temperature. The current monitor
FUNCTIONAL BLOCK DIAGRAM
30 × VSET
29 × R
output, IPDM, maintains its high linearity vs. photodiode
current over the full range of APD bias voltage. The current
ratio of 5:1 remains constant as VSET and VPHV are varied.
The ADL5317 also offers a supply tracking mode compatible
with adjustable high voltage supplies. The VAPD pin accurately
follows 2.0 V below the VPHV supply pin when VSET is tied to
a voltage from 3.0 V to 5.5 V (or higher with a current limiting
resistor), and the VCLH pin is open.
Protection from excessive input current at VAPD as well as
excessive die temperature is provided. The voltage at VAPD falls
rapidly from its setpoint when the input current exceeds 18 mA
nominally. A die temperature in excess of 140°C will cause the
bias controller and monitor to shut down until the temperature
falls below 120°C. Either overstress condition will trigger a logic
low at the FALT pin, an open collector output loaded by an
external pull-up to an appropriate logic supply (1 mA max).
The ADL5317 is available in a 16-lead LFCSP package and is
specified for operation from −40°C to +85°C.
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responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
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